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TPS745-Q1: Additional information

Raul Pena
Prodigy 40 points

Part Number: TPS745-Q1

TPS74550PQWDRVRQ1 

A) Does the regulator have an anti-saturation circuit?

B) How much bias current does the regulator consume during drop-out (worst case input voltage)?

C) What are the ESR requirements for the output capacitor?

 

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  • 0
    TI__Expert 4900 points

    Hi Raul,

    1. This LDO uses a MOSFET for the pass device and therefore does not have an anti-saturation circuit.

    2. Ground current during dropout peaks at approximately 240µA at 25°C for a 3.3V output just before the part exits dropout. This may be slightly higher for the 5V version. I've attached figure 6-15 from the datasheet below which shows this.

    3. Unfortunately, I was unable to find a definitive set of limits for the ESR requirements. However, I was able to perform a rough simulation using the minimum and maximum COUT listed in the datasheet and the bandwidth of the LDO to determine a rudimentary set of ESR requirements. The device should be stable with ESR between 0 ohms and 15m ohms at the least. The datasheet also explicitly states that the LDO is stable with ceramic capacitors so the device should be stable within the typical ESR range for ceramics.

    Best,

    Aden