UC2823ADW minimum on time for PWM duty cycle

Jamaal_Charles

Hello,

We are using part # UC2823ADW. I was looking for a minimum on time for the PWM duty cycle but was not able to find one. Could you please provide me with a minimum on time requirement for the PWM output duty cycle?

Thanks,
Eric

over 13 years ago

0 John Bottrill over 13 years ago

TI__Mastermind 25130 points

Eric,

The Ramp pin has a leading edge blanking feature which can be disabled by leaving unconnected however ti remove board parasitic capacitor impact You might want to connect thi pin to the IC quiet ground through a 2 k resistor.

Theoretically the IC will smoothly go to zero pulse width as you decrease the on EAOUT assuming that the ramp voltage is smooth and it should drop to zero duty cycle as the EAOUT voltage goes between 1.1 volts and 1.4 volts. Any noise on the RAMP may cause problems for you. The minimum duty cycle is not tested in production.

See attached for an explanation.

Regards,

John

http://www.powermanagementdesignline.com/howto/204703125;jsessionid=KEYVAIFGTSNH2QSNDLRSKH0CJUNN2JVN

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UC2823ADW minimum on time for PWM duty cycle