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UCD90120 Suitability questions

Other Parts Discussed in Thread: UCD90120A, UCD90120, TPS2051B

Hi,

I'm looking at a new hardware design that has an FPGA with power-up and power-down sequencing requirements. My design will not have a PMBus master, instead the FPGA will only be expected to read the VMON values over I2C from the 90120.

My current thought would be to connect the 2 incoming power rails of my card (5V and 3V3) to 2 VMON inputs (voltage dividered down to < 2.5v). When they are 'good' the 90120 needs to sequence on all the other lower voltage rails as required by the FPGA and additional circuitry.

I can't see how in the Fusion GUI how to deal with the voltage divider, so I guess I just have to tell the GUI they are ~2.0V rather than 3.3 and 5 (assuming my voltage dividers reduce 5v->2v and 3v3->2v)

Once all my sequenced power rails are 'good' the FPGA will use the I2C interface to read their scaled-down ADC values during normal operation.

In the event of ANY power rail going 'bad', I need to sequence off my internal power rails. I can't see any way of doing this in the GUI. I did find the "Shut down with delayed configuration using TOFF_DELAY" option under the 'Fault Responses and Limits' tab - but it's grayed out? There also goesn't appear to be a way of displaying this in the Vout config "Sequence on and off timing" window

I've attached my project file fyi, and I'm sure there must be a way of doing what I want - I'm not sure if I'm being restricted by the GUI or missing something

1777.XMC-523 U90120.xml

Any help appreciated,

Bruce.

  • I can't see how in the Fusion GUI how to deal with the voltage divider .... Enter the resistive divider ratio on the "Other Config" tab in the Scaling section (Vout Scale Monitor)

    I can't see any way of doing this in the GUI. I did find the "Shut down with delayed configuration using TOFF_DELAY" option under the 'Fault Responses and Limits' tab - but it's grayed out?

    The "Shutdown" option should be available. I think there is something corrupt with the project and our GUI folks are looking at it.

  • Hi Eric,

    Did the GUI folks come back with any response to the 'Shutdown' issue?

    I have a couple of other questions now too,

    Can you confirm that with the PMBUS address set to 85 the JTAG port is still available for boundary scan testing of the card. I want to use both interfaces, the I2C for programming and voltage monitoring during normal operation, but I also need the JTAG interface for manufacturing test - the datasheet states that JTAG isn't available unless the PMBus address is 126. I'm hoping that just affects programming/normal use?

    In the datasheet (SLVSAN9 - April 2011) on page 15 it states 12 analogue voltages can be monitored by the analogue input pins - but the UCD90120A has 13 analog input pins? It also talks about the time required to convert all 14 analog inputs. I'm confused :-S Is the 14th analog input the V33A supply rail?

    Finally, I need to use one of the GPIO outputs to control an N-channel power MOSFET that switches on 3v3 to the rest of my card. As a feature request, can I ask that the next spin of the device family includes a charge-pump output pin option? Is there a TI part that'd you'd recommend that I could use that would neatly take the 3v3 GPIO logic output and charge pump it up to say 10V, enough to drive the gate of the Power MOSFET hard enough to ensure a low Rds loss?

    Thanks,

    Bruce.

  • Please try the GUI version linked from: http://www.tifusiontools.com/TI-Fusion-Digital-Power-Designer-1.8.182.exe

    Also, would it be much trouble to upgrade to the UCD90120A? I think you will find many more useful features over the UCD90120. Pin-pin compatible and to upgrade you can simply reload UCD90120A firmware into your UCD90120 over the PMBus port (using Fusion).

    Can you confirm that with the PMBUS address set to 85 the JTAG port is still available for boundary scan testing of the card. I want to use both interfaces, the I2C for programming and voltage monitoring during normal operation, but I also need the JTAG interface for manufacturing test - the datasheet states that JTAG isn't available unless the PMBus address is 126. I'm hoping that just affects programming/normal use? The device can switch from normal to JTAG mode by changing the address. Address 126 puts the device into JTAG mode (GPIO19-22 now behave as JTAG pins and not as normal use pins). You can put the device into JTAG mode by either shorting or open circuit of either address pin (so you could just short one of the normal address resistors and reset the part to put it into JTAG mode). Remember that UCD90120 (or A) does not support boudary scan (only pass through mode) and as such the JTAG port is really only useful for programming (but progrmaming over the PMBus port is much easier).

    In the datasheet (SLVSAN9 - April 2011) on page 15 it states 12 analogue voltages can be monitored by the analogue input pins - but the UCD90120A has 13 analog input pins? It also talks about the time required to convert all 14 analog inputs. I'm confused :-S Is the 14th analog input the V33A supply rail? 14 analog channels are sampled. 13 external (MON1-13) and the internal temp sensor. Only 12 can be used for voltage rails and the 13th could be used as a temp or current monitor.

    Finally, I need to use one of the GPIO outputs to control an N-channel power MOSFET that switches on 3v3 to the rest of my card. As a feature request, can I ask that the next spin of the device family includes a charge-pump output pin option? Is there a TI part that'd you'd recommend that I could use that would neatly take the 3v3 GPIO logic output and charge pump it up to say 10V, enough to drive the gate of the Power MOSFET hard enough to ensure a low Rds loss?f How about using a USB power distribution switch as the pass device? Take a look at TPS2051B which can operate from 2.7 to 5.5V. You can wire the UCD GPO to the enable pin of the power switch. The power switch pass device is driven with an internal charge pump. Additionally, you have current limiting protection.