DCAP2 stability

I have lots of different PPT files.  I am not sure which one I sent out.  Regarding stability, there are several things to consider.  DCAP2 is inherently stable for almost all designs as the phase is increasing at the crossover frequency and can never drop below zero until after the system becomes "sampled".  After that point, the loop response is no longer valid anyway. I believe that the measured loop response only tells part of the story. I have tested several designs that I intentionally made with decreasing phase margin.  The time domain transient response for each does not degrade.  The time domain response to a step load change is the ultimate test for true stability.  Let me see if I can put something together that meets your needs.  It may take a day or two as I have a pretty solid back log for today.

Hi John,

it is good to have some things that explain the theory and the way DCAP2 work, if possible you can also include so block diagram or phase gain plot to show me and my customer what is happen with the stibility loop.

actually i using TPS54527 and i testing this chip with the kit Ti provided and this kit also include a inject poit for us to measure the phase margin of the circuit  (ref to Slvu481 section 3.2) after i measure the phase margin only 31 deg which is less than 45 deg, base on the blog i know this is normal to DCAP2 but i cannot explan why this suppose to be and please show me what is the proper way to verify the stibility of the circuit.

Thank you.  

I've been tied up with some other issues this week.  I'll  try to put something together tomorrow.

Hi John,

We have been using TPS54425 converter in our design , which uses DCAP2 control method.

Can you please mail any material explaining on how DCAP2 control method works?

Also , the datsheet recommends a list of inductor and output capacitor values corresponding to each ouput voltage.

Can u please provide the high frequency zero value, introduced by the converter to compensate the double pole due to filter?

Regards,

Bragadishwaran

HCL Technologies

bragadishwaran.k@hcl.com

The inductor and capacitor values are recommended for stability.  The capacitor values are relatively low as DCAP2 control has good transient response without the need for large output capacitance.  Most of the DCAP2 material I have is TI internal only as the details of the control scheme are proprietary.  I probably have something I can share though.  Please contact me directly.  The actual zero location is proprietary as well.  I do not know it even.  But I can tell you the approximate value.  You can observe it from a loop response plot, so in that case it is not strictly a secret.  I'll get those when I get to the office.

Hi John,

Thank you very much.

Can you please share the materials in the following id,

bragadishwaran.k@hcl.com.

Hi John,

   I also have 1 question about stability. From customer they use TPS54225 & additional circult to do high low margin vout. Attached schematic, FYR.

But when doing high low margin, the output will over 5%tolerance, we try do add highside FB cap(1nF) to solve this issue.

Is any suggestion about this cap value range from 22pF to 1nF etc…? & how to make sure the stability about this schmatic?6545.54225.pdf 

Thanks.

Hi Chris,

I am considering using the below DCAP2 converters in my Product design

TPS54327

TPS560200

Also the TPS53318 DCAP converter.

We are trying to assess the risks involved with the DCAP and DCAP2 type control mode converters. Can you pls share below information?

- Guidelines on Stability Measurement (Bode Plot analysis) for the DCAP and DCAP2 converters?

-  Any relevant material which explains the concept of DCAP and DCAP2 and how stability is ensured even considering the component tolerances in mass production.

Would appreciate a quick response as this information is critical for our component selection decision.

Thanks

Louis

For TPS54327 and TPS560200 you can measure the loop stability in the usual manner.  we use 50 ohm in series with the upper feedback divider resistor as a place to attach our network analyzer.  Here is a link to a technical document:

http://www.ti.com/lit/an/slva546/slva546.pdf