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UCC3895 maximum duty cycle

Other Parts Discussed in Thread: UCC3895

Dear All,

we use UCC3895 as PSFB, input 400Vdc, with12V output. We are finding the way how to limit the maximum duty cycle.

- Beside input voltage drop, is there anything else can cause the PSFB converter reach maximum duty cycle?

- Do anyone suggest how to limit the maximum duty cycle? by external circuit is acceptable.

Thanks 

  • Knighty,

    I don't understand your question. The A/B pulses are designed to be near 50% each as are the C/D pulses. I assume you are not trying to make them significantly less than 50% each which would  be achieved by the  DELAYAB and the DELAYCD resistors.

    When OUTA and OUTD are both high or when OUTB and OUTC are both high power should be delivered to the load . The variations of the time when both of these are high is a functionof the control loop.

    Are you trying to ensure that the *** width of the power pulse is no more than a certain per centage of the total available time? If so how much?

    Regards,

    John