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Hi there.
I wanted to ask you guys if there is a library file for this device for the pcb.
I am using EAGLE CAD Software and theres nothing in the library which looks similar to that.
Any help would be appreciated.
it is a really tiny devcice and i couldnt find anything with this specifications.
Thanks Alot.
Shahzad
I attached the Gerber. Note that this is a new technology and the EVM was layouted with larger resistor to make it easy to change programming components and is not optimized for space.
Hi Mr. Mauny.
Thanks for the gerber files.
I am completely new to this. Can u please let me know how to open these files in eagle? is there anyway you could have the library component for the bq25504 with the board part only?
Thanks
Shahzad
Your software should be able to import gerber files. You need to get support from your software provider, if you need help since I am not familiar with your issue.
I can send those files to any shop and they can make the board, so the files should be generic.
AFAIK a gerber file is for manufacturing pcb's.
I think the original question concerns an EDA (electronics design automation) description of the BQ25505 part itself (not the EVM board.) It could be as simple as a specification of the mechanical layout of the QFN-16 packaging, or more sophisticated to include labels on the pins that name the function of the pin, or even more sophisticated, an electrical description so it could be simulated.
I don't think an EDA suite can construct a component description from a gerber board description.
Who usually provides such files, the manufacturer of the component (TI) or the developer of the EDA suite (Eagle)? I suspect Eagle is responsible for providing a generic QFN-16 component, which an Eagle user might be able to customize with pin labels.
I found these...
QFN16: ftp://ftp.cadsoft.de/eagle/userfiles/libraries/qfn16.lbr
It is a great starting point for the bq25504. Note this footprint adequate but not excellent. (missing keepout, paste,...)
QFN20: ftp://ftp.cadsoft.de/eagle/userfiles/libraries/silabs-eth.lbr
This library is good for the bq25570 as it contains a QFN20 package and is very well defined.
Pin organisation and package size was wrong for the bq25570 so I made my own part/library.
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direction="pwr"/> <wire x1="-17.78" y1="-17.78" x2="-17.78" y2="17.78" width="0.254" layer="94"/> <wire x1="-17.78" y1="17.78" x2="17.78" y2="17.78" width="0.254" layer="94"/> <wire x1="17.78" y1="17.78" x2="17.78" y2="-17.78" width="0.254" layer="94"/> <wire x1="17.78" y1="-17.78" x2="-17.78" y2="-17.78" width="0.254" layer="94"/> <pin name="VIN_DC" x="-20.32" y="2.54" length="short" direction="pwr"/> <wire x1="-17.78" y1="-17.78" x2="-17.78" y2="17.78" width="0.254" layer="94"/> <pin name="VOC_SAMP" x="-20.32" y="0" length="short" direction="in"/> <pin name="VREF_SAMP" x="-20.32" y="-2.54" length="short" direction="in"/> <pin name="EN" x="-20.32" y="-5.08" visible="pin" length="short" direction="in" function="dot"/> <pin name="VOUT_EN" x="-5.08" y="-20.32" length="short" direction="in" rot="R90"/> <pin name="VBAT_OV" x="-2.54" y="-20.32" length="short" direction="in" rot="R90"/> <pin name="VRDIV" x="0" y="-20.32" length="short" rot="R90"/> <pin name="NC1" x="2.54" y="-20.32" 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<text x="-5.588" y="2.286" size="1.4224" layer="95">BQ25570RGR</text> <text x="-17.78" y="-20.32" size="1.778" layer="95">>NAME</text> </symbol> </symbols> <devicesets> <deviceset name="BQ25570" prefix="U"> <description>TEXAS INSTRUMENTS BQ25570 - VQFN20 http://www.ti.com/lit/ds/symlink/bq25570.pdf</description> <gates> <gate name="G$1" symbol="BQ25570" x="0" y="0"/> </gates> <devices> <device name="RGR" package="QFN20"> <connects> <connect gate="G$1" pin="EN" pad="5"/> <connect gate="G$1" pin="LBOOST" pad="20"/> <connect gate="G$1" pin="LBUCK" pad="16"/> <connect gate="G$1" pin="NC1" pad="9"/> <connect gate="G$1" pin="NC2" pad="17"/> <connect gate="G$1" pin="OK_HYST" pad="10"/> <connect gate="G$1" pin="OK_PROG" pad="11"/> <connect gate="G$1" pin="PWPD" pad="21@0 21@1 21@2 21@3 21@4"/> <connect gate="G$1" pin="VBAT" pad="18"/> <connect gate="G$1" pin="VBAT_OK" pad="13"/> <connect gate="G$1" pin="VBAT_OV" pad="7"/> <connect gate="G$1" pin="VIN_DC" pad="2"/> <connect gate="G$1" pin="VOC_SAMP" pad="3"/> <connect gate="G$1" pin="VOUT" pad="14"/> <connect gate="G$1" pin="VOUT_EN" pad="6"/> <connect gate="G$1" pin="VOUT_SET" pad="12"/> <connect gate="G$1" pin="VRDIV" pad="8"/> <connect gate="G$1" pin="VREF_SAMP" pad="4"/> <connect gate="G$1" pin="VSS@1" pad="1"/> <connect gate="G$1" pin="VSS@2" pad="15"/> <connect gate="G$1" pin="VSTOR" pad="19"/> </connects> <technologies> <technology name=""/> </technologies> </device> </devices> </deviceset> </devicesets> </library> </drawing> </eagle>
(rename the file with the extension .lbr - the TI blog tool doesn't allow that extension)
Conclusion and thoughts:
Although I'm using these files/libraries, I make no claim to their validity. Always check before you turn the board.
Eagle by default will assign the ground tab paste amount at 100%. This means that the paste will be applied across the entirety of the bottom pad if you plan on manufacturing it. This very often results in excess solder for the bottom pad which then creates a "floating" part on a concave island of solder when reflowed. This is especially true of their are no vias under the bottom pad to wick/pull away the solder. My rule is ~50% fill on bottom terminated components and it hasn't failed me yet. It offers better part adhesion, coplanarity and thermal conductivity.
Happy making!
Michael
