The LM5069 data sheet indicates the MOSFET gate should turn on within 55 usec of UVLO going active high. So we use UVLO as an enable input to high side power rail of a heater expecting it to turn on very quickly when we take ULVO high. The hot swap charging capacitor is set up for an insertion delay of 400 msec. Instead of the UVLO input turning on the rail immediately, we see an insertion delay of 400 msec occurring every time we pulse the ULVO input off then on regardless of how long VIN has been at 48V. It is our understanding that the 400msec insertion delay POR timer should only occur from the point VIN first reaches 7.6V. Instead the part also seems to be looking at the UVLO input to restart the insertion delay timer POR.
Secondly, if it turns out that toggling the UVLO signal does restart the insertion timer, can we get quicker power cycling time by toggling the OVLO pin high then low? In the block diagram, the OVLO pin routes to the gate logic directly instead of to the timing logic.
