Hi, I have a project I'm trying to get off the ground. I need to drive hundreds of capacitive loads 0V to 120V (or 100V) at up to 2Apeak. The output will be constantly updating at up to a 10KHz rate (over this 0V to 120V range), so obviously, this is not a conventional power supply design. I basically know the idea of PWM and know I want to use a half bridge amplifier design, but am starting from scratch, shooting for lower current,good heat dissipation, higher edge rates, and low latency. The front end of the circuit will be an FPGA (probably Virtex-5 or 6) It appears that the digital PWM controllers will not meet my speeds due to the latency and digital resolution of the sawtooth, so I'm ok with the analog direction.
Can you help me with a good half-bridge design example (and IC choices) that could get me going? Any application notes or existing circuits? I tried the POWERLAB, but didn't really find anything that made sense.
Thanks.......