TPS65217C + AM335x DDR3 power-up/dn sequence problem

Richard Jones

I may have hit a slight problem with the power up/dn sequence of the TPS65217C (for AM335x with DDR3), even though it's the prescribed PMIC. It could just be an interpretation problem of the processor's datasheet. Do the dashed vertical lines in figures 4.1 to 4.5 (pages 91-95) of the processors198-page datasheet (SPRS717C) indicate a region where 1v8 and 1v5 can come up in either order? If so it could be better drawn, if not there's a problem as the PMIC's 1v5 DDR3 rail beats the 1v8 rail.

I have spotted several mentions of avoiding more than 2v difference between the ramping up/down of 1v8 and 3v3 regions, if this also applies to 1v5 & 1v8 then obviously it's met, but this isn't a stated requisite.

Using the TPS65217C with an Am335x and DDR3 we get:

PMIC order	PMIC regulator	voltage	Processor use
1st	LDO1	1.8v	RTC
2nd	DCDC1	1.5v	DDR3
3rd	LDO3	1.8v	VDDS_PLL CORE_LCD VDDS_SRAM_CORE_BG VDDS_SRAM_MPU_BB VDDS_PLL_MPU VDDS_PLL_DDR VDDA_1P8V_USB0/1 VDDA_ADC VDDS
4th	LDO2	3.3v	VDDSHVx VDDA_3P3V_USB0/1 osillator module etc,
5th	LDO4	3.3v	other peripherals: Ethernet Phy, FLASH etc
6th	L2, L3	1.1v	VDD_CORE & VDD_MPU

Hope someone knows the answer?

over 13 years ago

0 Stephen Nortman over 13 years ago

TI__Expert 4525 points

The DDR3 rail and the 1.8V rail can come up at the same time. No specific requirement beyond that they both have to come up before the 3.3V rails.

We chose to stagger the DDR3 rail and the 1.8V rail by 1ms just simply so that we would have a known sequence.

The only real requirement is 1.5V/1.8V --> 3.3V --> VDD_CORE, VDD_MPU

0 Daisuke Maeda over 11 years ago in reply to Stephen Nortman

Guru 20205 points

Hi Stephen,

Can both LDO2 and LDO4 be used for the 3.3V power terminals on the AM335x?

Please see the application note below. Section 8, 9, and 10 describe how to use the TPS65217C for the AM335x. Only LDO4 is used for the AM335x. LDO2 and LDO4 can not come up at the same time and there is a 1msec delay between them.

http://www.ti.com/lit/ug/slvu551h/slvu551h.pdf

The AM335x datasheet only describes that all 3.3V power supplies can come up at the same time.

Best regards,

Daisuke

0 Gregory Watkins over 11 years ago in reply to Daisuke Maeda

TI__Expert 4005 points

Daisuke,

You can use both LDO's. As long as all the 3.3V are up after 1.8 and before the core voltages.

0 Daisuke Maeda over 11 years ago in reply to Gregory Watkins

Guru 20205 points

Hi Greg,

Thank you for your reply.

Best regards,

Daisuke

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TPS65217C + AM335x DDR3 power-up/dn sequence problem