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TPS78601

I have one question about impedance of power plane for TI LDO. We have a system that includes 2xTX, 2xRX, and one feedback, so there are 2 DACs, 3 ADCs and FPGA in a board. We use many TI LDOs to transfer voltage for digital and analog voltage pins of ICs. Do you think we need to use many decoupling capacitors to compress the impedance of each power plane in LDO output? Or you have better suggestion, and why?

  • Hello,

    It is always a good idea to have plenty of decoupling capacitance even if the impedance at the output of the LDO is very low.  This low level impedance  of the LDO is bandlimited to a few hundred kilohertz depending on the LDO control loop characteristics.  Use whatever capacitance is recommended by the DAC, ADC, or FPGA - Often, these devices create their own noise which causes problems especially if that noise is outside of the LDO loop bandwidth.

    Bill