• State Resolved
  • Locked Locked
  • Replies 2 replies
  • Subscribers 63 subscribers
  • Views 397 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS54140 UVLO variation

ou gareth
Intellectual 340 points
Other Parts Discussed in Thread: TPS54140, TPS54140A

Dear Sir:

For TPS54140’s UVLO, the Enable voltage (Ven) variation is too large (0.9~1.55V), and let the start-up voltage has the same way.

Our production is operated within this range: 12~30V, so it will be fail under the designed value(R1=348Kohm & R2=44.2Kohm).

Could you help us to confirm the question:

(1)   The Ven variation is from 0.9V to 1.25V?

  • 0
    TI__Mastermind 35165 points

    Hi Ou,

    The Ven variation of 0.9V to 1.55V is correct. But note this is over all input voltage and temperature. Most of this variation occurs when operating closer to -40 deg C. I suggest designing the UVLO resistor divider to the typical value and not the minimum then check the with the min and max to see if it will work for your design.

    What output voltage are you designing for? Is there any issue in your application with increasing R2 to 56.9k?

    Also if a tighter Ven threshold is desired please look at the TPS54140A. This is the same part with one of the main changes being an improvement causing less variation in the Ven voltage threshold.

    Regards,
    Anthony

  • 0 in reply to Anthony F
    Intellectual 340 points

    Thank for you information, that will be helpful for us.