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TPS40210; SEPIC; IN:5-30V; OUT: 12V/0.5A

Martin Frank
Prodigy 30 points
Other Parts Discussed in Thread: TPS40210, TPS55340, PMP

I'm using more or less the same design(see above) as shown in http://www.ti.com/tool/pmp5657.1   (TPS40210, 12V Sepic) without "optional undervoltage lockout".

I tried with input voltage up to 15V. The Problem is that the outputvoltage becomes never more than 2V. I'm using a resistive load. (BTW: The voltage on ISNS is less then 200mV)

The Signal on the Gate(Q1-SI4804) has a frequency of 250kHz(as expacted regarding Fig 1 in datasheet) with a puls width of 75ns and a height of 4V.

Question: are there any Design Examples for Sepic Converter like the 2 examples in the datasheet ?

thx, Martin

  • 0
    TI__Mastermind 35165 points

    Hi Martin,

    After taking a look I have a couple questions and thoughts on what you can try. There aren't any design examples with the TPS40210 at the moment but you can try looking through SLVA516a for the TPS55340. This can help you select your input capacitor, inductor (coupled only), ac capacitor and output capacitor. As for compensation the most accurate method for a SEPIC is to measure the gain/phase of COMP to VOUT then compensate based on this. Modelling the SEPIC power stage is not an easy task but the compensation components calculated using the boost equations typically works as a simplification.

    Can you show a screenshot of the gate? Additionally I am curious what the signal looks like on either side of C3/C8, the two switching nodes. Based on the schematic, are you using two individual inductors instead of a coupled inductor ?

    My best guess is your supply is likely unstable because of the change in inductors and output capacitance. You are not using much output capacitance in comparison and you might not have enough. The PMP design uses 2x 330uF with some additional ceramic. With the changes you made you will need to modify the compensation components.

    Try putting a large capacitance on the output close to what is used in the PMP design to see if it becomes stable to check if this is the issue. If this doesn't work right away also try reducing R6 to 10k. This lowers the gain of your compensated error amplifier, lowering your loop bandwidth and increasing your phase margin.

    Lastly you can try increasing the AC capacitance (C3 and C8) but you might be fine with what you have. You can try using two 2.2uF instead to see if it has any effect.

    Let me know how this works out for you.

    Regards,
    Anthony

  • 0 in reply to Anthony F
    Prodigy 30 points

    Hello Anthony,

    thanks for your help! Now I know what is the "main" reason why my circuit was not working.

    Every thing is working better with  ground ;+)    =>look at pin 6 I forgot the GND connection. The circuit is now working(not very good regarding output regulation, but with output voltage as expexted)

    Regarding the design examples I found on Wikipedia a helpful link http://www.ti.com/lit/an/snva168d/snva168d.pdf, so I will try the circuit with the calculated values, lets see what happen.

    best regards

    Martin

  • 0 in reply to Martin Frank
    TI__Mastermind 35165 points

    Nice catch. I completely overlook that too. Happy to hear you got it working. Let me know if you have any additional questions.

    Anthony

  • 0 in reply to Anthony F
    Prodigy 30 points

    Hello,

    I tried to solve the problem with your design hints -> nothing changed

    I think that there could be still a problem with the compensation network. To have component values that make sense I'm using the AN slva516a, I'm now at the step where I need to calculate Equation 31/32/33. I know that the crossover frequency should be between 1/10 and 1/20 of the switching frequency (which is 600kHz) but how to find/choose Kcomp and Gea?

    thanks Martin

  • 0 in reply to Martin Frank
    TI__Mastermind 35165 points

    Hi Martin,

    For compensation you will not be able to use slva516a. The Kcomp value should either be based on measurements, simulations or estimations for the design based on the gain of the power stage at the target bandwidth frequency. The Gea will not available for the TPS40210 because this uses a standard voltage mode error amplifier.  The TPS55340 has a transconductance error amplifier.

    My recommendation is to use the boost calculations starting on page 21 of the TPS40210 datasheet. If you can measure the gain/phase response of the COMP to output voltage Kcomp is the inverse of the measured gain at your target bandwidth frequency (KCO in the TPS40210 datasheet). If you have no method of measuring the gain/phase response from the COMP pin to output voltage, the boost estimation for KCO is typically adequate for a stable design.

    Regards,
    Anthony