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Synchronizing the UCC28070

Other Parts Discussed in Thread: UCC28070
I also posted this in an old UCC28070 post by ron f.  However since that thread was already answered, I thought I should start a new thread instead.
I'm trying to synchronize two UCC28070 ICs, however they seem to be ignoring my synchronization clocks.
I have CDR pulled up to 6V, and I am sending a 100kHz 3.3V PWM with a 222ns on-time into the RDM pin.  I set both the Rt and Rdmax resistors to 165k (each phase switches at 45.5kHz).  In case I misunderstood your instructions, I also tried 82.5k (each phase switches at 90.9kHz) and 332k (each phase switches at 22.6kHz).  In all cases my 100kHz PWM was completely ignored and the phase never ran at 50kHz like I expected.  Am I using the wrong resistor value?  Is there anything else that could cause the part to ignore the clock signals?
  • A colleague of mine has seen similar.

    I believe what may be tripping you up is the Rdmx resistor.

    Duty cycle max is 92% minimum

    Calculate and set Rdmx per eq 4 to set RDMAX at 140Kohm if Rt is 165Kohm  (EQ4)

     

    CDR to 6V - OK

    222ns pulse - OK (200 to 250ns recommended), 

    3.3V levels on pWM are OK

    100KHz to achieve 50Khz - OK

    Rt =165k  for FPWM =  45.5 KHz or so and is slower than sync input

    Duty cycle max is 92% min

    Calculate and set Rdmax per eq 4 to set RDMAX at 140Kohm

     

  • Changing Rdmx fixed it.  It started synchronizing once we put a smaller Rdmx resistor on, but I don't understand why this would matter.  It runs fine at 100% duty cycle when I'm not synchronizing.
    Is there any information available about how synchronizing works on the UCC28070?  We would like to be able to select the frequency by changing the PWM frequency, and we would like to be able to keep duty cycle as close to 100% as possible.  We can increase the PWM duty cycle to trick Dmax if necessary.  I can't find any information about a minimum Dmax of 92% in the datasheet.  We found that by changing the Rdmx to 147k we could get 98.4% or 99.3% at 150k.
  • One hurdle down then.  I did misread the datasheet in that Duty mx (min)  is not an absolute number, but a tolerance +-3% around 95%.  I am checking on how the clcoking works internally.  I do know that the EVM and design sheets I have looked at have set it as high as 97%.