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Trouble with using UCC38C40 to control boost converter

Other Parts Discussed in Thread: UCC38C40

I design a boost converter using UCC38C40 as control chip, the parameters are, input voltage 12 V, output adjusted to 48 V and should work in CCM. I find some problems with output PWM duty cyle, it would not go to steady state even though output is stable.

The following are some waveform of circuit,

C1 white line is voltage on pin 1(FB), C2 green line is waveform of output PWM. C3 is input current. C4 is voltage on pin 3(current sense).

The output voltage is adjusted around 17 V. Ouput PWM duty cycle should be around 30%.When I test it in open loop, the control chip works at 116K Hz frequency.

The data in the image above is collected when circuit works in closed loop. The problem is that output PWM composed a wide pulse about 4.8 us(about 55.81% duty cycle based on 116K Hz) and a spike with same magnitude of pulse. I believe this spike is the initial of a sequence PWM.

I am wondering why can't PWM output be 30% duty cycle for each periode?

The bottom line (blue) is the voltage of current sense? Why it does not follow the ramp of input current which is in yellow in above image?

The following is circuit schematic

The input inductor is 130uH, it is my mistake that I don't correct it in schematic.

He, Siyu

  • Hi Siyu

    Please check the schematic and your proto board.

    Seems you are driving the IR2110 entering HIN while driving the mosfet with LO.

    I suggest to connect the OUT pin of the controller (pin 6) to LIN pin of the driver (pin 12) leaving pin LO (pin 1) drive the mosfet through R44.

    Please put also a low impedance cap before L7.

    Good luck

    Flavio

  • Hi, Flavio,

    Thanks for your reply. I changed the schematic, I do use LIN pin to drive mosfet.

    The following image is waveforms after I add input capacitor(330uF)

    The sequence of waveforms are the same.C1 white line is voltage on pin 1(FB), C2 green line is waveform of output PWM. C3 is input current. C4 is voltage on pin 3(current sense).

    It seems like input capacitor does not change anything in waveforms.

    Besides this, I tried to connect a schotty diode from output of UCC38C40 to ground. It changes output PWM, but output voltage stays the same.

    So, I don't think shotty diode would help with my problem.

    He, Siyu

  • Hi Siyu

    Thanks for your feedback.

    I forgot to ask you if pictures posted were taken with loaded converter.

    If this is the case, there's little current signal going into the controller.

    If not, try to load the converter (please post a picture in this case) up to nominal load value.

    CH3 refers to input current taken after the 330uF cap?

    May you post a picture with Mosfet drain voltage instead of COMP out and Mosfet gate voltage instead of controller OUT?

    Do you have designed the unit for 1V signal on CS pin at full load (at minimum line voltage)?

    Is it possible for you to update the schematic with components values used in the proto?

    Please try also in reduce R51 from 2K down to 1K; not mandatory now but it will be benefical in replacing D16 with a schottky diode (MBR1645 as first trial).

    This will avoid to see the reverse recovery current spike when turning on the Mosfet.

    All for now; have a nice day

    Flavio

  • Hi, Flavio

    The pictures were taken with loaded with converter which outputs is about 24 watts.

    CH3 refers to input current when there is a input 330uF cap connecting input source postive and negative poles.

    In following image, CH1 is voltage across drain and source of mosfet. CH2 is waveform of mosfet gate to source.

    The current sense is about 0.8 ohm, 2 watts, which is design for boost input voltage 12v to ouput 48v. Because in 12 to 48 v case, the notches in gate of mosfet are much worse and cause input current jumps a lot. Shown in the following picture. But the design requirement is to boost output voltage at 48V.

    As you may see in the picture, the input current would not work at steady state and there are notches in gate signal. Another question is that why does not CH4(current sense voltage) follow waveform of input current? In boost current, inductor current is the same with input current, right?

    He, Siyu

  • Hi Siyu

    One more question: in posted pictures, the current signal seems to be AC coupled. Is this the case?

    If so please may you DC couple scope input in order to show also the dc component.

    In case scope is already DC coupled, there's something wrong with this signal.

    As you mentioned, it should be in phase with input current; furthermore signal should be zero during mosfet off time and it should not going negative.

    There's a chance you have a stability issue: considering you wish an output voltage of 48V, you should add some slope compensation to the current signal.

    This will help a lot also during start-up, considering the 28C40 doesn't have the soft start function.

    I'm posting the schematic of a similar product developed ten years ago (24Vin, 40 or 60 Vout, about 60W).

    5807.boost.pdf

    Good luck

    Flavio

  • Hi, Flavio

     The current signal is DC coupled.

    I believe it is because of stability issue, because I don't have slope compensation to current signal. Would you please help to interpret slope compesation circuit(R13, C10, Q1, R10, C8,C5)? I don't how does it work and the values of C5 and part number of Q1 do not show in the pdf you gave me.

    He, Siyu

  • Hi Siyu

    Sorry for missed values; C5 is 10uF and Q1 is a BC817 (any small signal, 40V NPN should be fine e.g. PH2222A or similar).

    C8 and C5 are bypass caps on Vref signal. Q1 is used to buffer the ramp signal coming out from the controller.

    C10 remove the DC offset on this signal (in some application can be shorted).

    R13 in combination with R8 add the compensating ramp to the Current signal coming from the sense resistors (R11, 12,14 and 15).

    Basically slope compensation is required in every peak current mode topologies with operating duty cycle above 50% toavoid sub-harmonic oscillations.

    You may find some good theory on TI web site inthe design seminars archives.

    A graphical explanation is given here: http://www.ti.com/lit/an/snva555/snva555.pdf

    In my experience, it helps also when duty is not greater than 50% but approaches it.

    Please try and add slope compensation to your circuit.

    We will than discuss about the amplitude and phase of current signal reported in your pictures.

    Have a nice day

    Flavio

  • Hi, Flavio

    I tried the slope compensation which is exactly same with you gave me. The following the schematic of my circuit

    The following picture the waveforms of C1 white line is voltage on pin 1(FB), C2 green line is waveform of output PWM. C3 is input current. C4 is voltage on pin 3(current sense)

    It seems that the circuit works in steady state.

    In the following picture, the C1 white line is measured at right end of R53, C4 blue line is measured on pin 3. in this case, slope compensation is not connected to pin 3, R53 does not connect with pin 3.

    I am wondering why the voltage on pin 3 does not follow input current waveform? I am thinking can I adjust the slope of compensation by changing values in slope compensation circuit? what if this slope compensation would not work for my design?

    He, Siyu

  • Hi Siyu

    Glad to see better waveforms!

    I think In the first picture C1 refers to output voltage instead of COMP voltage on the controller (roughly 50V....).

    There's still the CH4 waveform to fix.

    Considering the good dc offset visible about input current (about 1.5A with peak current of 2A assuming zero voltage at the picture bottom) and R50 of 0.4 Ohm, you should see a corresponding signal with a peak amplitude of 0.8V and 0.6V dc offset. Most important it should go to zero during mosfet off time.

    Please may you check circuit and scope connections and channel phase.

    Also may you post a picture with CH4 at 200mV/div with slope compensation connected and full load on output.

    About slope comp values, you have absolute freedom to change everything in order to better suit your application.

    Did you try also in replacing D16 with a 100V schottky diode? (16CTQ100 or similar).

    All for now, have anice day

    Flavio

  • Hi, Flavio

    First of all, thanks for your contiuous patience with my problem and hope you have a good thanksgiving break.

    Come to my problem, I don't have a schotty diode fit for my circuit. My circuit is design to ouput at 48V, C1 is measured at output end,so if  a schotty diode is used for this purpose, I don't think it is needed.

    The followng image is C4 at 200mV/div with slope compensation connected with full load(129ohms).

    Because it compose of slope compensation and current sense voltage, I don't know it is right. Is it similiar to you, if it is not, this may be wrong.

    The below image is slope compensation without connected to pin 3.

    I tried to change values of C63 and R53, but it does not change the slope of compensation. Which are the values that could adjust slope?

  • In the application note, understanding and applying current mode control theory,  for boost converter, the required compensation up-slope is vin*Ri/L and down-slope is (vo-vin)*Ri/L. In my case, vin=12v, vo=48v, Ri=Gi*Rs=3*0.4=1.2 where Gi is current sense amplifier gain(for UCC38C40 is 3) and L=128uH. My calculation are required up-slope is 112500 and down-slope is 337500. In the picture of slope compensation without connected to pin 3, the up-slope is 250000 and down-slope is 868421, both of compensation are greater than the required and satisfy.

    However, the current sense voltage is not like what it should be. So I am not sure whether my calculation is applicable for this.

    Furthermore, would it be the reason of RCD subber circuit of mosfet that causses the current sense voltage goes wierd?

    He, Siyu

  • Hi Siyu

    It's always a pleasure helping colleagues.

    I live in Italy so we don't celebrate Thanksgiving (but we do celebrate a lot of other circumstances....)

    About your circuit. Please remove all snubber network across the mosfet and diode.

    In this case the use of a schottky device is mandatory considering also the frequency you are running.

    Probably we are facing with two distinct situation causing the current signal to appear wrong.

    First is boost diode recovery. The part number indicated in your schematic is an ultrafast device which exhibit a large (for this application) reverse recovery.

    Scottky diode don't have this behavior due to the different physic of the silicon junction.

    If the 16CTQ100 is not available there, you may use a MBR10100 from ON Semi or other similar devices with average current of 4A minimum.

    Please consider that ultrafast devices are no longer used in high frequency (greater than 100KHz) PFC applications, replaced by silicon carbide devices.

    Second aspect is the RCD snubber network. When turning on the mosfet, there's a nother current spike due to the diode in series with resistor and cap network.

    Please apply those two changes and probably all the issues will disappear.

    About slope compensation component values: leave them as they are in my schematic for the initial tests; we than optimize all the network at a later stage.

    Good luck

    Flavio

  • Hi, Flavio,

    As with the snubber circuit, I think it really did great job on reducing spikes and noise. Without snubber circuit, the magnitude of spikes caused by switching mosfet is far beyond 1V, it may cause UCC38C40 shut down output. So I am going to try schotty diode or equivalent SiC diode when I get them. I need to order 16CTQ100 and some SiC devices, and it may take several days to get to me. For now, would we discuss about component values of slope compensaton?

    He, Siyu

  • Hi Siyu

    As long as your output voltage will be 48V or so, you don't need SiC devices (they are rated for 650V); they wil worse converter's efficiency significantly compared to schottky devices.

    In case you want to do some comparison tests (and you have time to do this), try and modify boost converter working frequency from 100KHz down to 50KHz leaving the power stage as it is in this moment. Than try and increase R44 (the series gate resistor); schematic report a 10R: go to 33R.

    You wull se the great benefit of this on spike and noise on M6.

    About slope compensation components:  C63 should be sized to offer a reactance about 15 to 20 times lower than R53 at converter's working frequency.

    The criteria to size R53 is the one you found in literature.

    To be on the safe side, resistor value is than reduced by 20 to 40% in order to keep into account for all deviation about all components involved (controller included).

    All for now, enjoy the circuit!

    Flavio

  • Hi, Flavio,

    I tried with different value of C63, the slope of compensation do not change? Is it able to change?

    I have another question, how to adjust the duration of upslope and downslope(the ratio of thes two)? It seems like, the duration of upslope would change with duty cycle of output PWM, am I right? If so, how does the UCC38C40 do these?

    He, Siyu

  • Hi Siyu

    Good to hear from you again. Here are some answers.

    C63 doesn'thave any effect on slope compensation (unless its value is so low that its reactance is comparable to series resistor R53; please stay well away from this condition; look my post dated Nov 28 for dimensioning criteria).

    C63 purpose is to cancel the DC offset present on the timing ramp (see my post dated Nov 22nd about this).

    When using slope compensation, you need only to work on the up slope of the ramp signal.

    The reason is that peak current mode controllers work only on this portion of the current sense signal.

    Situation is different on average current mode ones, but this is not your case (the 38C40 is a peak current mode controller).

    Time duration of this signal is not duty cycle related but only controller's operating frequency related.

    In order to adjust for proper level of slope compoensation signal, you need to work on R53 and R51.

    My suggestion is to leave R51 at 1K and than adjust R53 according to your calculation.

    Should you wish to change R51, please remember to adjust also C62 value to leave the time constant of the filter the same.

    Ciao

    Flavio

  • Hi, Flavio

    It has been long ago since we discussed last time, I hope you remember some about my circuit, because I have one more question that need your help.

    The picuture below is taken from oscillosope after I remove snubber circuit from mosfet. From the top to bottom, the first line(white) is output voltage, as you might see, there are a lot of ripple. The second waveform(yellow) is input current, it is the same with inductor current in my boost converter, with peak value 1.47A and valley value 0.95A. The third waveform(green) is PWM input to mosfet. The fourth one(blue) is the voltage accross current sense resistor, with peak value 0.48V and valley value 0.27V.

    The problem is that the current sense resistor is about 0.4 ohm, the peak voltage accross it should be 0.588V and valley voltage 0.38V. There is 0.1v difference between measurement and calculation. How does this happen? The freewheeling diode is a schotty diode HFA08TB60.

    As you might see on the picture, the output voltage has realy large ripple. How can I do with this?

    Hope to hear from you soon.

    He, Siyu

  • Hi Siyu

    Good to hear from you.

    Current sense section is performing correctly. Calculated and measured delta current  perfectly match.

    The offset you are observing could be generated in current probe positioning.

    Please be sure to put the current probe in series with mosfet to make a 1 to 1 comparison.

    About ripple on the output.

    Please be sure to use a schottky diode (the HFA08TB60 is an ultra fast, not a schottky one).

    Some improvements could be done using low ESR caps on the output to absorb ringing current visible on your picture.

    Please try also in adding a good film cap in parallel with output cap (1uF 100V should be OK).

    Last chance could be in using a higher gate resistance to drive the Mosfet.

    Please note that this will impact converter's efficiency lowering it.

    All for now, keep me updated with progress.

    Enjoy

    Flavio

  • Hi, Flavio

    The schottky diode I use is 16CTQ100(replaced HFA08TB60). The schematic below is my new circuit, I changed some values, R53 now is 460 ohm and the mosfet  I use is IRF540.

    I have three more questions:

    (1) The ''adding a good film cap in parallel with output cap (1uF 100V should be OK)'', what is the film cap? I find V metallized Film Capcitor, is it what you mean? And I read a application note from TI, it says to use ceramic cap to reduce ripple. Is ceramic cap a kind of film cap?

    The other 2 questions are kind of long and needing picutures to illustrate, I made 2 two more post following this one.

  • The 2nd question is about switching frequency. I found out that if I increase input voltage, the UCC38C40 would also increase its switching frequency. Like the pictures showing below, from the top to bottom, the first one is with input voltage 10.5V, results in sw freq 128KHz. The 2nd one is with input volt 11.6V, results in sw freq 135KHz. The 3rd one is with input volt 12.4V, results in sw freq 163KHz.

    I am guessing is it due to the slope compensation circuit? The RT/CT pin is also connected with Q1 signal transistor.

  • The last question is about how measure the compensation slope. I think the added slope should has same freq with sw freq and at least has up-slope last as long as inductor peak current value occures. Am I right? I measured the slope compensatin circuit I am using, I got different value with different configures.

    (1)The disconnect R53 with CS pin of UCC38C40 and measure the waveform at the right side of R53. The compensation up-slope ends right at the shut off point of mosfet. The slope peak-peak value is 1.69V. The valley vallue is negative,-0.9V.

    (2)Connect R53 back to CS pin, disconnect R51 from R50(current sense resistor) and keep R51 open. The compensation up-slope also ends right at the shut off point of mosfet. The compensation slope peak-peak value is 0.93V and valley value is negative, -0.4V.

    (3)Connect R51 back to R50 and there is no input voltage to power stage. The peak-peak value is 0.34V and valley value is -0.12V.

    My question is which peak-peak value should I used to put into my calculation? Based on my circuit theory knowledge, I think I should use 3rd value. However, if this is the case, the slope is too low and it is difficult to increase it.

  • Hi Siyu

    About metal film caps, please have a look at this:

    http://www.kemet.com/kemet/web/homepage/kechome.nsf/file/KEM_F3028_F461-464.pdf/$file/KEM_F3028_F461-464.pdf.

    Switching frequency should not be input voltage dependant.

    Please put a filter capacitor (0.47uF ceramic X7R) between Vref and GND pins of the 38C40 (be careful on layout).

    Slope compensation.

    Basically you need to match inductor current downslope with oscillator up slope.

    In your calculation, the amplitude of oscillator ramp is Vpeak - Vvalley (don't consider DC offset).

    Let me look around; I should still have some good paper explaining the theory.

    I'll be in touch tomorrow with this

    Ciao

    Flavio

  • Hi, Flavio,

    Thanks for your help and document. I don't think the document explains why choose mentalized cap other than ceramic?

    Please tell me which compensation slope of the three connections is the right one that I should design on.

    I did not find such a 0.47uf ceramic cap in lab, I already connect a 0.1uF 25V ceramic cap between Vref and GND, the sw freq variation test are based on this connection.

    He, Siyu

  • Hi, Flavio,

    You are probably busy at this time, please take your time. If you find anything helpfull, please let me know.

    He, Siyu

  • Hi Siyu,

    Sorry for late answering; I was busy with a business trip.

    Two words about ceramic versus film caps.

    Ceramic caps are not the best choice for current absorbing applications.

    Please remember that they have also the bad attitude to reduce their capacitance when DC biased.

    On the other side film caps are bigger than cermaic so not very popular in space constraints application.

    Electrical behavior for polyester (or film) caps is superior to cermaic; so please try and use one of this.

    I found some good literature explaining slope compensation.

    Please try and follow suggested procedure.

    In case of further difficulties let me know; I will do the calculation for you.

    http://www.ti.com/lit/an/slua053/slua053.pdf

    Enjoy

    Flavio

  • Hi, Flavio,

    Thanks for your time and effort to help me.

    I read the document and did the calculatin based on the page 8 as followed, please let me know if there is any mistake.

    Because I am designing a non-isolated boost and used derivation from it, there is no step 2 and 5 in my calculation.

    Step 1: Indcutor Downslope S(L)=(48-12)v/(130uH)=0.277A/us

    Step 3: Equivalent Ramp Downslope voltage Vs(L)=0.277*0.4=0.111V/us

    Step 4: Downslope of compensation circuit. I measured the waveform at right side of  R53 while disconnect it form CS pin and leave its right side open, the waveform is shown below

    Vs(osc)=1.69V/6.8us=0.249V/us

    Step 6: m=1 R2(equivalent to R51 in my circuit)=1k. R2=1k*0.249/0.111=2.243K.

    He, Siyu

  • Hi Siyu,

    Your calculations are correct.

    Refering to your schematic, R51 = 1K (R4 in paper) and R53 = 2K2 (R2 in paper).

    Have a nice day.

    Flavio

  • Hi, Falvio

    Thank you for your help. I will try to measure the frequency response of circuit, but I don't know how to yet. How do you measure?

    Hope you have a wonderfull day.

    He, Siyu