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Behavior when not using a capacitor and resistance for SS-input-pin of TPS40200.

Other Parts Discussed in Thread: TPS40200

Please teach us two following questions of TPS40200.

1. Behavior when not using a capacitor and resistance for SS-input-pin of TPS40200.

2. Are there countermeasure IC of static electricity that TI recommends on using TPS40200?

And are there guidelines that showed recommended layout on customer's application of countermeasure IC?

・Background of question 1

Our customer consider reducing R and C in the application due to their application's space.

If R and C of SS-input-pin disappear, We expect that a start of Vout becomes early.

Will not function have the hindrance even if not using R and C of SS-input-pin?

Best Regards,

Tsuguhiko Asai

  • Please see my answers to your questions below.

    1. If there is no capacitor on SS the TPS40200 tries to immediately regulate to the output voltage. This causes it to operate at max duty cycle to charge up the output as quickly as possible. The downside is a large amount of inrush current from the input supply which could cause it to dip. The output voltage can also overshoot during startup.

    2. I'm unsure what you are looking for with this question.

    Regards,
    Anthony