Please teach us two following questions of TPS40200.
1. Behavior when not using a capacitor and resistance for SS-input-pin of TPS40200.
2. Are there countermeasure IC of static electricity that TI recommends on using TPS40200?
And are there guidelines that showed recommended layout on customer's application of countermeasure IC?
・Background of question 1
Our customer consider reducing R and C in the application due to their application's space.
If R and C of SS-input-pin disappear, We expect that a start of Vout becomes early.
Will not function have the hindrance even if not using R and C of SS-input-pin?
Best Regards,
Tsuguhiko Asai