TPS 2020 OC Response

In your product, what is OCx interfacing with? A device which can add a "deglitch" or some digital type filtering works best. If the device receiving OCx is a buffer of some sort, then find out what the required logic levels are and then design a passive "deglitch" using a) resistor, R1 between OCx and buffer input, b) filter capacitor, C from buffer input to GND, and c) pullup resistor, R2 from buffer input to a dc voltage.

In your product, try to quantify the OCx glitch during power up (depends on load capacitance, load, and other system level items) in terms of time duration of the glitch. Then you can size the R's and C accordingly to help prevent the buffer output from toggling. Choose R1 and R2 so that the proper buffer logic input levels are achieved (R1 should be < R2 or ~ R2/5 or so) from a dc perspective. Then choose a value of C which can prevent the glitch from causing a transition of the buffer input thresholds during the determined OCx glitch pulse width.