Dear all,
I want to have the reaction time for the AFE SC Dsg timing as short as possible to be able to handle short high current pulses (malfunction transient loading) as a safety mechanisme. I have verified that both timing and current level corresponds very vell with the TI documentation - as long as I do a Reset from MAC when changing the data. I have tested timing from 915us to 61us. It all works fine
My question is: If I set the AFE SC Dsg Cfg Most significant Nibble (SCDT3 - SCDT0) TO 0x00 (equals 0 us according to the SLUA404 page 111) does that mean that the time before SCD will be much shorter than 61us - or does that mean that I disable the SC Dsg function instead ?
I do not want to destroy the FET, - therefore I rather do not want to test this before I have asked for comments if anybody know.
Best regards
Kjell