Question/Problem:
At what Vin-Vout does PSRR start falling?
Answer:
For a PMOS pass element based LDO, the PMOS FET provides some gain to the loop which is directly proportional to PSRR. As Vin approaches Vout, the pass element moves from the linear region into saturation so it can't provide gain anymore. For the TPS795, PSRR drops significantly for Vin-Vout < 0.4V. Later IC datasheets have curves with lower Vin-Vout.