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It looks like this circuit is related to application note: http://www.ti.com/general/docs/lit/getliterature.tsp?literatureNumber=slva163&fileType=pdf
The gate voltage of 1.9V seems unusual. Look at VCC IN, pins 4 & 5, and VCC 12 OV with an oscilloscope (10x probe with Rin >= 10MOhm) to see if these are DC or not. Does the source droop to the UVLO when the load starts to draw current?
If pin 4 is dc 1.9V, look for board leakage or some other loading on it.
Other comments are that R30 and R40 are fairly high - does the base of Q1 droop when the TPS2400 turns on? Your Note 1 indicates normal operation to 15.2V, however the gate drive is a minimum 16V, meaning that probably not much more than 13 - 14V can be expected on the output (somewhat depending on the load current).
I try to lessen R30 and R40 down to 10k ohm, the phynomenon still happen.
the following picture is the wave on pin4, pin5, vcc_12v and vcc_in.
abnormal situation:
probel on pin4
probel on pin5
probel on pin4
probel on pin5
linjie pan
It looks to me like there are several problems going on.
The first problem is that your source impedance is too high for the charge/startup current of the load. As the load starts drawing current, the source voltgae falls until the TPS2400 UVLO is tripped. For the capacitive load, the charge current is based on ( Cload x dVout/dt). There may also be a non-capacitor component of loading. Sometimes this changes with preconditioning (e.g. starting from fully discharged Cout may be different from a condition with remaining charge - that is some of the circuits may be active). Some possible isdeas are to: 1) reduce load capacitance, 2) reduce source impedance (or reinforce with a parallel capacitor), 3) slow output dv/dt with a gate-ground series R-C (as a guess, start with a 330pF / 1K), 4) assure that any load element (e.g. switcher) is held off during start.
You should check this, but it seemed to me like during the non-start series of pictures that the computed/waveform bias transistor Vbe was too large. You should try and measure this, but possible causes might be a bad transistor or the C-E reversed.
You can gain some additional insight by looking at the startup waveforms for a succesful start.
it seams that the phynomenon does not happen again after place 1uf capcity between the base of Q1 and gnd,.
I need to check it more.