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Lm3481 Mosfet parameters selection

Other Parts Discussed in Thread: LM3481

Hi,

I want to use LM3481 in SEPIC configuration. I read the datasheet, and I have some doubts about the Mosfet parameters selection.

From the datasheet, I read that the Mosfet parameters are:

  1. Vth (min) - I understood! It must be lower than 6V if Vin>6V or lower than Vin if Vin<6.
  2. Rds(On) - I understood! It influences the Vg, the Mosfet power consumption and the ripple current. But what are acceptable values?
  3. Total Gate charge - What will this influence? (The dynamic characteristics) But what are acceptable values?
  4. Reverse transfer capacitance - What will this influence? What are acceptable values?
  5. VDS - no doubts.

Thank you in advance,

A. Paiva

  • Hello Almerindo,

    For #3 total gate charge will influence the amount of current the IC driver uses to switch the FET. This current draw dissipates power in the IC and will affect the temperature of the IC.  (Pd = Vin * Qg*fsw)

    For #4 the Crss (or Cgd) can have a big effect on the switching time of the FET. The longer the switching time the more power dissipated during it and the more the FET heats up. As the datasheet then shows though its easier to quantify this switching loss by using charge instead of capacitance. So I would use Qsw if provided or Qgd+(Qgs/2 ) if its not.

    Its hard to give you acceptable values for the parameters because they will depend on your application. You can use the power loss equations from the datasheet to try and estimate acceptable values. The FET should spec a normal Rthja which will estimate the temperature rise based on power dissipated. You can use this to make sure your FET doesn't over heat.

    I would also recommend using WEBENCH® though, you can enter through the LM3481's product panel (http://www.ti.com/product/LM3481) and put in your design requirements. It will try and use the IC to make your design and show you parts that should work for it. 
    *Note: for it to do a SEPIC design with this device your output must be in between your inputs or it will default to a boost. If you want a SEPIC even though its always boosting I can show you how to get around this.

    Best regards,
    Tommy 

  • Dear Mr. Tommy Jewell,

    Thank you very much for your reply.

    I need to use this device in a SEPIC design, because my input power supply can be lower or greater then the ouput. (Vin=9-45, Vout=12@1.2)

    I started to use the WEBENCH, but it doesn't give me an alternate part for the FET. And some of the operating parameters(duty-cycle, FET switching losses, and others) differ from my calculation.

    In resume, the Qg is used to calculate the switching losses of the LM3481, and Crss is used to calculate the switching losses of the FET.

    Best regards,

    A. Paiva

  • Hi Almerindo,

    Make sure that you and WEBENCH are designing for the same switching frequency, also WEBENCH is designing an uncoupled SEPIC and if you are following the app note I believe that's a coupled design. But the calculations should give you similar results to your equations, especially for duty cycle. If they are very different I will have a look and make sure everything is working properly.

    I'll have to check into why WEBENCH wasn't giving you any alternate FETs, but the FET it picks should give you a good starting point for parameters as you look for your own FET.

    Yes, Qg for is for IC losses, and Crss or Cgd (in the form Qgd along with Qgs) is for the FET losses.

    Best regards,
    Tommy 

  • Dear Tommy,

    Thank you again.

    What the main differences of coupled and uncoupled SEPIC? And the main advantages? Could you provide me an uncoupled app note for this device?

    The duty-cycle is D=(Vout + Vdiode) / (Vout + Vdiode + VinMin - VQ),

    For, Vdiode =0.79V, Vout=12V, VinMin=9, and VQ= Rdson*(IL1(avg)+Iout) = 0.185V, (Rdson=65mOhm).

    So D=59.1%, and WEBENCH gives me 60.5% (yes, I know it's a small difference, but's not equal) I try to consider also the influence of Vrsens=Rsense*(IL1(avg)+Iout) = 0.064V (Rsense=22mOhm).

    But even so, D=59.37%.

    Best regards,

    Almerindo Paiva

  • Hi Almerindo,

    They are not extremely different, but in an uncoupled SEPIC the output side inductor usually is picked to be a larger value for stability reasons, the coupling in the coupled design takes care of this itself. Coupled designs thus often offer a smaller footprint but the trade off is that it can be harder to find off the shelf coupled inductors for you application.Here's a note talking about the differences: http://www.ti.com/lit/an/slyt411/slyt411.pdf

    Those duty cycles are close, I would bet the difference is in VQ. WEBENCH looks at the FET's power dissipation and calculates a temperature based on datasheets stated thermal resistance. A FET's Rdson will increase with this temperature though so WEBENCH also takes that into account. With a slightly higher Rdson your VQ will be higher and duty cycle will increase.

    Best regards,
    Tommy