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bq34z100 I2C TIMING CHARACTERISTICS

I have a question about I2C Bus Timing Characteristics.

In datasheet, SCL/SDA rise time is max 300ns.

Is this misdescription?

300ns is very difficult condition.

I think other devices is max 1000ns.

  • The 300ns rise and fall time specification requirement is based on operating the device at 400KHz. The slew rate can be slower when operating at a slower I2C frequency. The official I2C specification documents Standard-Mode and Fast-Mode operation. The device should conform to either of these requirements.