This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Sync Pin (LM2267x) - advanced information

Other Parts Discussed in Thread: LM22670, LM2670

Hi support team,

I have a design with the LM22670 as 24V -> +15V and a 24V -> -15V converter. Synchronizing in reference to -15V has been solved already :-)

Now I want to implement this:

  1. Switch on the power (24V) and let the Switcher run freely (maybe with a predefined frequency via RT - let me say 700 kHz)
  2. (maybe Enable the Switcher by applying an appropriate voltage at the EN pin or simply let it start up with the presence of 24V in)
  3. then I need the freedom to synchronize the Switcher without "resetting" it - I want to synchronize it (with a given higher frequency from the exteranl FPGA)  while running it. I'm not allowed to DISABLE -> ENABLE it. 

The reason for this is to have a common DC Switcher Design with the freedom of synchronizing it whenever an ext. frequency will be applied. If this ext. signal won't be available, the switcher should run with a defaut frequency (but even higher than the default 500kHz). It's not recommended to have different hardware setups for "free running" and "externally synced".

I know this was possible at least for the LM2670: synchronizing this simply means applying a higher frequency than the "free running" frequency.

Question: does this work with the LM2267x family also? For me the SYNC pin of the LM22670 seams a little bit more "high fancy" (due to configuration timeout period while starting up) compared to the SYNC the LM2670...

Thanks in advance and best regards

Wolfram

  • Hi Wolfram, 

    It seems that you can do free-running (500kHz) frequency and synchronize to external clock with higher frequency. You can do that without having to disable/enable or power cycle the chip. If you are in synchronization mode (RT pulled down with a 1k resistor) and sync signal is not present after initialization, the part will switch at the default 500kHz clock.

    The restriction described in the datasheet is that you cannot adjust the free-running frequency AND be able to use the synchronization function at the same time.  

    It seems that you would like to have free-running frequency at higher than the default 500kHz and also be able to synchronize to even higher external clock. Let me know if I am understanding you correctly.

    I would like to double check with the designer of the chip if there are exceptions to this restriction and get back to you later today or early tomorrow.

    Regards, 

    Denislav