HI there,
if we look at the internal diagram of the TPS65910, we see various LDOs supporting a great drop of voltage over them.
This is so that the most of the power dissipated by these rails are caused by the internal voltage drop than supplying the target.
There is any recommended measure to get this undesirable power ou of the chip?
I observed that, given the power sequence is not possible to create a cascade of supplies in way to reduce that effect.
Thanks
Luis
