Hi everyone, im testing a prototype of PFC with UCC28070 with this goal:
Output Power: 3.1 kW
Output Voltage: 390 V
Input Line: 90 V to 250 V at 50 Hz
Switching Frequency: 100 kHz
My design it's made from two board, one power board and one daughter board, connected togheter with a connector without any wires.
I've read all application note about it and TI example design, also i've used excel sheet for calculate components value.
I take supply for UCC28070 (and other some circuits) from a flyback stage made with NCP1055 that works at 100 kHz and 12 V output. I've tested this stage at 250mA and works with very clean voltage and start in less than 20 ms after i power up the system.
Actually i'm using a 100 uH for coil and ratio of 1 to 200 for TA. If other information are necessary please ask and i do my best for post it.
When i disconnect resistors between mosfet gate and mos driver i can see that duty cicle work at full period (i've limited at 85% and i measure at UCC28070 output); i've very clean and not distorted signal at VINAC pins (only 47pF for filtering in that pin) and VSENSE is about 2 V (also here only 47pF for filtering in that pin and same resistor network of VINAC), VBULK is about 325 V with 230 VAC at line.
When i connect also one resistors (or both) between mosfet driver (one UCC27424 for each mosfet that is FCH47N60 for each phase) and gate i've 450 V for VBULK, same signal at VINAC and VSENSE but all gate signal from UCC28070 are disable.... how it's possible??
Sorry for my little english, any help would e appreciated.
Regards