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UCC25230 Flybuck converter - efficiency at light loads

Other Parts Discussed in Thread: UCC25230

I am evaluating the UCC25230 "flybuck" converter, and having little success achieving the desired efficiency.  The eval board has been modified from the design values (5V rails instead of 12V, lighter loading, 23-25V input range).  The modified design fucntions well, is comensated properly, but does not achieve anywhere close to the 60%+ efficiency shown on the datasheet efficiency vs. power output curves (extrapolated for 24V input).  instead it is running below 50% for 50mA load (total of both rails, Iout1=15mA, Iout2=35mA).

I am not using the Coilcraft MA5401 220uH coupled inductor that comes populated on the eval board (5 ohms DCR, coupling > 0.99).  Instead I am using Ice P/N XT01 transformer (100uH, 0.6A, 320mohms DCR, 150nH Llkg, 10V*us).  Does anyone have any insights into what parameters of the inductor other than DCR could contribute to the poor efficiency? BTW, design calulations per TI app notes call for >= 30uH @ 50mA, 400kHz switching frequency.

Thanks to anyone who has any answers.

  • 1. How did you make extrapolation to obtain 60%+ efficiency?

    2. How did you calculate to obtain 30uH @50mA?

    3. Power losses include switching losses and conduction losses. DCR is part of conduction losses. Switching losses include core losses, and MOSFET switching losses, etc.

    4. IC has its own power losses.

    5. Your design power level is about 50mA x 5V = 250mW. The EVM power is 12V x 65mA x 2 =  1.56W

    6. Some of the losses are more like static and not related to the power level. These losses will take more percentage when rated power is lower.

    7. PCB design sometimes if not always, has effect to the power losses.

    8. You may provide the design with schematics and layout to allow more analysis.

    9. Can you describe how you measure the efficiency? Did you measure the EVM efficiency and confirm ok?

  • Thanks for the response to my query.  My answers to your questions are below in red:

    1. How did you make extrapolation to obtain 60%+ efficiency?

    Figure 2 of the UCC25230 data sheet "Efficiency vs. Output Power" @ 0.25W.  No 24V input is shown, so I (perhaps erroneously?) continued the trend for decreasing input voltage, assuming that "static" losses for the VDD regulator would decrease and raise the efficiency.  I realize this is not precise, and may be overlooking other factors internal to the chip, such as boost diode losses, etc.

    2. How did you calculate to obtain 30uH @50mA?

    Equation (1) from Application Report SBVA034 "UCC25230 Bias Power-Supply Design Review":

    LPRI = (VO)(1 – DMIN) / (2)(Δ%)(IPRI)(FSW) = (VO)(1-(VO/VI(MAX))) / (IPK_PK)(FSW)

    IPK_PK = (2)(IMAX – IPRI) = 2(220mA - 50mA) = 300mA

    VO = 5V

    VIMAX = 25V

    FSW = 380kHz

    3. Power losses include switching losses and conduction losses. DCR is part of conduction losses. Switching losses include core losses, and MOSFET switching losses, etc.

    Absolutely.   DCR for the ICE XT01 transformer is 0.32 ohms, compared to 5 ohms for the MA5401 coupled inductor.  MOSFET switching losses are the same (internal switch + fixed switching frequency), don't know the core losses for thie XT01 compared to the MA5401.

    4. IC has its own power losses.

    Which internal losses for the IC might be affected by my application circuit?  Certainly the losses for the VDD regulator will be smaller for a 24V input.

    5. Your design power level is about 50mA x 5V = 250mW. The EVM power is 12V x 65mA x 2 =  1.56W

    Correct.  I understand that I should have lower efficiency in general due to the lower power level.

    6. Some of the losses are more like static and not related to the power level. These losses will take more percentage when rated power is lower.

    Agreed.

    7. PCB design sometimes if not always, has effect to the power losses.

    Eval board layout is a constant.

    8. You may provide the design with schematics and layout to allow more analysis.

    It is the UCC25230EVM-754 eval board with the following component value changes:

    C13   OPEN

    C8 = 2.2uF/25V, C14   OPEN

    C10 = 2.2uF/25V, C13   OPEN

    C9 = C11 = 100nF

    Type III-B compensation network component changes:

    R1 = 6.04k

    R3 = R6 = 17.4k

    R7 = 562

    C3 = 6.2nF

    C4 = 130pF

    C7 = 1nF

    9. Can you describe how you measure the efficiency? Did you measure the EVM efficiency and confirm ok?

    Yes, the EVM as delivered seemed to perform as described in the specs.

    Efficiency was measured using a resistive load to obtain 15mA on Vo1, and 35mA on Vo2 (nominal - actual measured values were slightly different):

    Used equation Po/Pi = [(Vo1)(Io1)+(Vo2)(Io2)] / (Vin)(Iin).

    All dc currents and voltages were measured using recently calibrated Fluke DMMs.

    ------------------------

    I have since increased the output capacitance from 2 x (2.2uF||100nF) to 2 x (4.7uF||100nF) solely to reduce the ripple.  Compensation components R1, C3, C4 are changed accordingly:

    R1 = 12.7k

    C3 = 2.7nF

    C4 = 62pF

    As expected, this had no effect on the efficiency measurements, but the output voltage ripple was significantly reduced.

    Load step of 0 - 50mA has good response, no overshoot or ringing in the output voltage step ( about 150mV).

    BTW, I have requested additional data for the XT01 transformer that is not lised in the data sheet, namely inductance vs. current and inductance vs. frequency.

    Thanks again for your response, and I look forward to your feedback.

     

  • 1. How did you make extrapolation to obtain 60%+ efficiency?

    Figure 2 of the UCC25230 data sheet "Efficiency vs. Output Power" @ 0.25W.  No 24V input is shown, so I (perhaps erroneously?) continued the trend for decreasing input voltage, assuming that "static" losses for the VDD regulator would decrease and raise the efficiency.  I realize this is not precise, and may be overlooking other factors internal to the chip, such as boost diode losses, etc.

    I do not think your extrapolation approach would work as design parameters are different. Since your design has full power of 0.25W, from that figure, the efficiency at 0.25W is quite low and around half of full load. I think you may want to do your own efficieny calcualtion and analysis instead of using the EVM.

    2. How did you calculate to obtain 30uH @50mA?

    OK, I think this gives you the smallest inductance you can use. But with the current ripple so high, it will make high RMS current which contribute high conductin losses.

    Equation (1) from Application Report SBVA034 "UCC25230 Bias Power-Supply Design Review":

    LPRI = (VO)(1 – DMIN) / (2)(Δ%)(IPRI)(FSW) = (VO)(1-(VO/VI(MAX))) / (IPK_PK)(FSW)

    IPK_PK = (2)(IMAX – IPRI) = 2(220mA - 50mA) = 300mA

    VO = 5V

    VIMAX = 25V

    FSW = 380kHz

    3. Power losses include switching losses and conduction losses. DCR is part of conduction losses. Switching losses include core losses, and MOSFET switching losses, etc.

    Absolutely.   DCR for the ICE XT01 transformer is 0.32 ohms, compared to 5 ohms for the MA5401 coupled inductor.  MOSFET switching losses are the same (internal switch + fixed switching frequency), don't know the core losses for thie XT01 compared to the MA5401.

    DCR * I^2 is the DCR power loss - so you might want to look at the inductor RMS current to see that can be further reduced. Also, what would be XT01 core losses? 

    4. IC has its own power losses.

    I mean this potion of losses might take higher percentage as your design is onle 1/6 of the EVM full power.

    Which internal losses for the IC might be affected by my application circuit?  Certainly the losses for the VDD regulator will be smaller for a 24V input.

     

    5. Your design power level is about 50mA x 5V = 250mW. The EVM power is 12V x 65mA x 2 =  1.56W

    I think you need to make efficiency analysis on your design. The datasheet figures are typical with design and operation conditions which are not the same in your case.

    Correct.  I understand that I should have lower efficiency in general due to the lower power level.

    6. Some of the losses are more like static and not related to the power level. These losses will take more percentage when rated power is lower.

    Agreed.

    7. PCB design sometimes if not always, has effect to the power losses.

    Eval board layout is a constant.

    8. You may provide the design with schematics and layout to allow more analysis.

    It is the UCC25230EVM-754 eval board with the following component value changes:

    C13   OPEN

    C8 = 2.2uF/25V, C14   OPEN

    C10 = 2.2uF/25V, C13   OPEN

    C9 = C11 = 100nF

    Type III-B compensation network component changes:

    R1 = 6.04k

    R3 = R6 = 17.4k

    R7 = 562

    C3 = 6.2nF

    C4 = 130pF

    C7 = 1nF

    9. Can you describe how you measure the efficiency? Did you measure the EVM efficiency and confirm ok?

    Yes, the EVM as delivered seemed to perform as described in the specs.

    Efficiency was measured using a resistive load to obtain 15mA on Vo1, and 35mA on Vo2 (nominal - actual measured values were slightly different):

    Used equation Po/Pi = [(Vo1)(Io1)+(Vo2)(Io2)] / (Vin)(Iin).

    All dc currents and voltages were measured using recently calibrated Fluke DMMs.

    ------------------------

    I have since increased the output capacitance from 2 x (2.2uF||100nF) to 2 x (4.7uF||100nF) solely to reduce the ripple.  Compensation components R1, C3, C4 are changed accordingly:

    R1 = 12.7k

    C3 = 2.7nF

    C4 = 62pF

    As expected, this had no effect on the efficiency measurements, but the output voltage ripple was significantly reduced.

    Load step of 0 - 50mA has good response, no overshoot or ringing in the output voltage step ( about 150mV).

    BTW, I have requested additional data for the XT01 transformer that is not lised in the data sheet, namely inductance vs. current and inductance vs. frequency.

    Thanks again for your response, and I look forward to your feedback.

    So it looks XT01 might be the only main component you can make fine analysis: try a different inductor and different ripple current (RMS). If it does not make any better, the efficiency might be just like that as the static power losses are taking higher percentage.