• State
  • Locked Locked
  • Replies 5 replies
  • Subscribers 63 subscribers
  • Views 262 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS2543 - About usage of TPS2543

Hide
Guru 21045 points
Other Parts Discussed in Thread: TPS2543, TPS2511

My customer is examining the circuit of the attached file.

Please tell me if there are any problems.

TPS2543 Circuit.pdf
  • 0
    TI__Intellectual 2795 points

    What's customer's application, 4.75V to 7.4V as the input volatege, if like this,  the USB port can see 7.4V, can't meet  reuqest: 4.75V to 5.25V.  Have some strange, so can you provide more detailed application background?

     

  • 0 in reply to Milo Zhu
    Guru 21045 points

    Hi, Milo

     

    It is voltage drop countermeasure.

    When the output current increases, Vbus may become less than 4.75V.

    My customer may raise the supply voltage to 7.4V(max) then.

    But, this circuit is "conceptional phase".

     

    Regards,

    Kanemaru

  • 0 in reply to Hide
    TI__Intellectual 2795 points

    So the voltage drop due to the output current increase is the customer best concern. But (1) I can't follow up why the attached files can achevie the function, (2) As above point out, supply voltage up to 7.4V, the USB port also can see the high voltage, can't meet request, (3) 7.4V- 5V, there is 2.4V drop, what's applicaiton condition can cause so large drop? (4) What's TPS2543 operation mode (SDP/CDP/DCP), if the USB port will be desinged as a charging port (DCP), maybe can try TPS2511, it has voltage drop compensation feature.

  • 0 in reply to Milo Zhu
    TI__Expert 7990 points

    Here are a few thoughts:

    If the voltage is being regulated at Vbus, the regulation point might need to be switched to the supply output when "OUT" is low.  To get reverse blocking, two PMOS would be required.  The supply should have appropriate current limiting, and the thermal limiting provided by the TPS2543 will not be present.  If the supply goes into current limit (output voltage falls), the PMOS might start limiting due to low gate drive, and dissipate more power than anticipated.  This should be studied.

  • 0 in reply to Martin Patoka
    Guru 21045 points

    Hi, Milo

     

    Thank you for the information.

    My customer connect TPS2543 and a connector with a USB cable 1.5mm.

    A voltage drop seems to be thereby large.

    My customer uses TPS2543 in SDP/CDP mode.

     

     

    Hi,Martin

     

    Thank you for the advice.

    I informed my customer of your advice.