BQ24160 - D+/- input pin behaviour

The IC will default to 100mA USB current limit because the pins will appear as an open and not a short.

We’re seeing some odd behavior when using the BQ24160.

1.  Plug in 5V to BQ24160 USB

2.  BQ24160 performs bad source detection, sees that the source is good

3.  BQ24160 starts the buck converter and powers SYS

4.  A microcontroller powered from SYS starts up programs the BQ24160 USB current limit to 500mA by writing 0x24 to register 2.

5.  Microcontroller reads back BQ24160 register 2 and confirms that the current limit has been set (the register reads 0xa4, which makes sense because the RESET bit (bit 7) always reads 1)

6.  400-500ms later, the BQ24160 starts limiting the USB current to 100mA.  The microcontroller reads the BQ24160 current limit register (register 2) to see that it’s been set to 0x84 (current limited to 100mA with RESET bit high).  Why doesn’t the current limit stay at 500mA?

The datasheet says that D+/D- detection will limit the current based on what the detection finds.  However, the datasheet also says that D+/D- detection is only performed in DEFAULT mode, which is before the BQ24160 is programmed over I2C.  Is the detection still running even though the BQ24160 is no longer in DEFAULT mode?

Are you writing to the watchdog timer to keep the charger in HOST mode?

Yes, we write the watchdog timer every 20 seconds after I2C communication is established (register 0 bit 7).  We also tried writiing the watchdog timer immediately after the setting the USB current limit in register 2.

Note that not all the bits in register 2 get reset after 400-500ms, just the USB current limiting bits (for example, if I set bit 2, charge current termination enable, it will stick after the 400-500ms).  Also, I wouldn't expect the watchdog to reset in 1/2 a second after initiating I2C communication.

Are the USB current limit registers the only registers being reset or are other registers reset as well?

No other registers we set are being reset.  From their default values, we are modifying the Vbatreg bits in register 3, the Ichrg bits in register 5, the Vindpm bits in register 6, the 2XTMR_EN bits in register 7, and the TMR_1 bit in register 7.  These new values all stick.

To be precise, we are _only_ seeing the IUSB_LIMIT bits in register 2 being set to their default.  For example, if we set bit 2 in register 2 (TE), it will stick even after the 400-500ms has passed and IUSB_LIMIT is reset.

BTW, register 5 reads 0x45 (vendor code: 0b010, revision 2.3)

EDIT: We have left the BQ24160 D+ and D- signals floating.

Hey Jeff, do you have any new insights into this?  When we short the D- and D+ signals together, the battery charger exhibits the expected behavior (assumes 1.5A current limit, does not change the current limit until programmed over I2C).

When the IC starts up it must complete its startup cycle (bad source detect, battery detect, D+/D- detect) regardless of when you enter HOST mode.  Is it possible that you are entering HOST mode before the IC completes its startup cycle and so D+/D- detect is completing after your write to the current limit register?

The HOST mode is entered after bad source detection.  We know this because MCU controlling the battery charger is powered by the SYS.  SYS doesn't come up until after bad source detection.

As for D+/D- detection, that's a good point -- I'm not exactly sure when that starts.  The datasheet says that "When USB is asserted the bq24160/0A/3 performs a charger source identification".  I took this to mean "When USB is above the undervoltage lockout".  This leads to a few questions:

-When does D+/D- detection start?

-Can an MCU know that D+/D- detection is starting?

-Can the MCU stop the results of D+/D- detection from being written to the IUSB_LIMIT registers?

To clarify, once the D+/D- routine starts it must complete.

The D+/D- starts 32ms after VIN crosses UVLO (i.e., follows the bad source detect routine).  If you enter HOST mode within the first 32ms of VIN crossing UVLO, the D+/D- routine will not initiate. 

Alternatively, if you use the CD pin to force the IC into HiZ at start up, then enter HOST mode, then exit HiZ mode, the D+/D- routine will never initiate.