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bq20z45-R1 AFE_P bit is set by ESD test

K. Sasaki14
Guru 10200 points

My customer is doing ESD test.

Then they observed that AFE_P bit in PFStatus register is set.

Have you ever observed this phenomenon?

And What is the cause that AFE_P bit is set?

This phenomenon is avoided by setting "AFE Check Time" to 0.

  • 0
    TI__Guru* 76230 points

    Kohei,

    The AFE_P bit being set means the ESD tests caused an error when the z45 was comparing certain RAM content and expected control bit states of the AFE with the values stored in the data flash. This simply means that your ESD protection implemented on your PCB is not adequate. Did you follow the layout guidelines shown in the user guide and did you implement ESD protection devices as shown in the schematic of the EVM for the device?

     

    -Onyx