Question about TPS54225 Startup

Toshio Ushikubo

Hello,

Please advice following questions from customer.

They needs following information to use PG to enable another regulator.

Q1:

Data-sheet explain "The power good function is activated after soft start has finished. The power good function becomes active after
1.7 times soft-start time.".

Please advice "1.7 times soft-start time." is from EN=High or Output start to rise ?

Q2:

There are delay from EN=High to Output start to rise.

Please advice how is this delay time and deviation.

Best Regards

over 12 years ago

0 JohnTucker over 12 years ago

TI__Guru**** 191445 points

The power good function is active after 1.7 x the soft start time, not from rising edge of EN. This allows the output voltage to settle and prevents unwanted glitches on power good. There is not any additional details available. I will ask the IC designer if there is more.

0 Toshio Ushikubo over 12 years ago in reply to JohnTucker

Mastermind 9620 points

Hello John-san,

Thank you for your answer.

I understand that PG is enabled after 1.7 x the soft-start time from output start to rise.

Please answer my Q2 (delay from EN=High to Output start to rise).

Best Regards.

0 JohnTucker over 12 years ago in reply to Toshio Ushikubo

TI__Guru**** 191445 points

Usually silicon device has bandgap voltage reference approximately 1.25V. Also VFB voltage is 0.765V. We have a comparator versus 1.25V, then SS voltage is compared to 1.25V.

Then easy calculation is 1.25/0.765 = 1.63. And we have some internal delay. So 1.63+a = 1.7

As for EN delay, we don’t have appropriate data. Then EN delay calculated below.

VREG5 charge current at EN L>H is 20mA.

Td=C*V(uvlo-wake)/I = 1u*3.8/20m = 190us

Usually we use 200us including delay.

0 Toshio Ushikubo over 12 years ago in reply to JohnTucker

Mastermind 9620 points

Hello John-san,

Thank you for your answer.

I can understand.

Best Regards.

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Question about TPS54225 Startup