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TPS65910 GPIO_CKSYNC pull-up or pull down?

Adam Hoover
Expert 5275 points
Other Parts Discussed in Thread: TPS65910

Hi Team,

 

I have a customer inquiring about the internal pull-up/pull-down resistors on the GPIO_CKSYNC pin of the TPS65910:

When GPIO_CKSYNC is configured as GPIO (not CKSYNC) does it have a pull up or pull down resistor?  (Customer will be using it as GPIO)

It is clear when configured as CKSYNC, it has a pull up which is active by default.  However, table 11 on pg. 28 of datasheet states GPIO_SYNC has a Programmable PD, making me think when this pin is configured as GPIO is has a pull down (vs. the pull up in CKSYNC configuration).  Have I interpreted this correctly, or is there a typo?

 

Thanks,

Adam Hoover

ACAT Support

  • 0
    TI__Expert 5275 points

    Hi, just wondering if anyone had gotten a chance to read through this?   

     

    The more I look at it, the more I think there is a typo and the pin has a pull up in both GPIO and CKSYNC configurations.  The datasheet only mentions enabling/disabling a pull up on this pin, never a pull down.  

    Also there is only 1 specified leakage current on this pin, which is negative.  The PWRON pin also has a negative leakage current from its pull up resistor.  Although this value is specifically for the “GPIO_CKSYNC programmable pullup”, I would think there would be an explicit mention of a pull down value if it were present. 

     Any feedback would be appreciated!!!

     

    Thanks,

    Adam Hoover

    ACAT Support

  • 0 in reply to Adam Hoover
    TI__Expert 5275 points

    Hi,

     

    After some internal investigation, I was able to verify the GPIO_CKSYNC pin has a pull-up in both modes (no pull down).  The values in the I/O Pullup and Pulldown Characteristics table are valid in GPIO and CKSYNC configurations.

     

     

    Best,

    Adam Hoover

    ACAT Support