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BQ33100 Schematic Design

Other Parts Discussed in Thread: BQ33100

To whom it may concern,

I designed the schematic with bq33100 in different Super-Capacitor (SC) series. Then, the design is stuck about how to consider the value of R30 to R33 according to the sample schematic on Page 50th of the Super Capacitor Manager document. Questions are listed as follows.

1) Could you provide details about how to design the 5 series SC charging circuit with these four resistors?

2) Why VC5 just get 1/3 value of voltage comparing to the original voltage value? However, the value from VC1 to VC4 is the original voltage of each SC.

3) How the four resistors (R30 to R33) should be considered in 5 series design?

4) How will VC5BAL be connected in the condition of SC series less than 5? The usage of VC5BAL is not provided when design the schematic with SC less than 5 in normal mode. It is only said that VC5 and VC5BAL are not used and should be connected to VSS in stack mode.

Thanks and regards,

Gang

  • Hi Gang,

    1. The design is pretty much straight forward. As can be seen in the data sheet, the schematic is for a 5 series cap.

    2. if you look at the recommended voltages on page 4 of the data sheet, the max voltage for VC5 is 1. for a 2.7 V capacitor, 1/3 of that will be 0.9 V. The idea is to keep the voltage below the recommended max voltage.This is accounted for in the algorithm of the device.

    3. R31 is obviously the balancing resistor. R32 and R33 are in place to ensure the voltage at VC5 is 1/3 of the cap voltage. That has been taken into account in the algorithm. Also, You can observe that Q9 is a different fet from Q4 and Q5, so if you are going to use a 5s cap stack, simply maintain the schematic as shown in the data sheet.

    4.Pls refer to the user guide of the EVM of the bq33100 downloadable from our website. How to connect for less than 5s  has been described in it. VC5bal and VC5 are to be grounded for 4s,3s and 2s caps.

    thanks

    Onyx