Dear, All
There are the following descriptions in P16 'HO and LO Output Drivers' of the data sheet.
"The LO and HO outputs are controlled with an adaptive dead-time methodology which insures that both outputs
are never enabled at the same time. When the controller commands HO to be enabled, the adaptive dead-time
logic first disables LO and waits for the LO voltage to drop. HO is then enabled after a small delay. Similarly, the
LO turn-on is disabled until the HO voltage has discharged. This methodology insures adequate dead-time for
any size MOSFET."
I have the following questions:
・ Which pin does the drop of the LO voltage observe?
・ How many V is the judgment voltage of the LO voltage drop?
・ Which pin does the electric discharge of the HO voltage observe?
・ How many V is the judgment voltage of the electric discharge of the HO voltage?
In addition, I receive a demand that the block diagram of the LM5117 level is necessary at the time of a design about LM5119.
・ Can I have LM5117 and the block diagram of the level?
Thanks, Masami M.
