Hello.
Is there a way to use three non-sequential rails in the UCD9244? i.e. use rail1, rail3, rail4 and leave rail 2 blank. The reason is we fabbed our 66AKH12 design before we knew about the errata of the ARM VCORE and the DSP VCORE being tied together in the 66AKH12. (despite being reviewed by TI).
If there is no way to not use a non-sequential set of rails, how to best disable rail2? Set the voltages and currents to zero, set the power on to PMBUS command which it will not recieve?
Thanks