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TPS54233 Vsense input bias

Other Parts Discussed in Thread: TPS54233

I can't seem to find an input bias / leakage spec on the Vsense pin on TPS54233.  Am I blind?  Was this simply forgotten or something?  The only information that's at all related is "choose R5 to be approximately 10k" (i.e., the relative dimensioning of the attached feedback resistors), but that's hardly conclusive.

  • If I recall correctly, the FET input to the error amplifier is extremely high impedance.  The leakage current is in the order of nA's.  That is below the measurement range of our test equipment.  I can confirm that next week.

  • JFET or MOS?  I suppose the whole thing is CMOS, or maybe BiCMOS?  Doesn't say...

    If it's MOS, then yeah, leakage should be pretty low (within supply rails -- give or take whatever the protection diodes do, if any, which I'm guessing isn't much at 2kV ESD), and it should be relatively free of RFI rectification effects (that are common issues with bipolar amps).  I agree, typical might be unfeasible to measure, but a guaranteed maximum should be specified so we know.

    I wonder why the typical design recommends such small feedback resistors, then?  That could be a real killer for battery operated apps (which is recommended in the DS's intro blurb).

    If those things (fab and max. leakage) could be brought to the datasheet, plus the good old tradition of specifying equivalent pin circuits, that'd be awesome.

    Thanks,

    Tim

  • It is BiCMOS.  We typically don't spec untested or uncharacterized parameters.

    For feedback resistors we usually shoot for values in the 10's of kohm.  Values from 1k to the hundreds of kohm are usually acceptable, depending on whether you are trying for highest efficiency or best noise immunity.

    We are considering pin equivalent circuits for datasheets, but it is not currently a requirement for us, but that may chnge in the next few months.