There are many power rails in my systems that all must sequence up very specifically. I want to understand all ways I can and cannot use this part regarding potential "sneak paths" where output voltage might show up when I don't want it.
Can we guarantee no output voltage from the TPS72010 under the following scenarios:
- Vin = 0V, Vbias = 3.3, Ven = 0V?
- Vin = 0V, Vbias = 0V, Ven = 3.3V?
- Vin= 0V, Vbias =3.3V, Ven=3.3V?
The light load regulation with Vin floating feature description in the TPS72010 datasheet implies a sneak path from Vbias to Vin. How much load needs to be applied to Vin to guarantee the output does not come up when Vbias and Ven are at 3.3V?
Could a more detailed device block diagram of the TPS72010 (that shows internal protections diodes and other current paths between pin) be provided?