Temperature measurement point of package for LP38512-ADJ

Hi, Donald Jones.

I appreciate your immediate response.

Thank you very much.

Best Regards,

Hidetoshi

Hi, Donald Jones.

I can't measure the bottom temprature of mounted LP38512-ADJ.

Please let me ask more questions.

1. Would it be possible to measure other points for θjc?

2. Can I have the data of ψjt?

3. Can I have application note on the measurement of Tj with θjc bottom?

Best regards,

Hidetoshi Matsunami

Thank you for your continued support.

Could you simulate the data for SO PowerPAD(DDA)?

Have a good thanksgiving Day.

Best regards,

Hidetoshi Matsunami

Hi, Donald.

Thank you very much for your supports.

Please convey my thanks to thermal group.

I would like to confirm just in case...

   " Theta JC, top = 61.7°C/W "

Is θJc(top) rating the center of top?

Best regareds,

Hidetoshi Matsunami

I really appreciate for your help.

Thanks

Best Regards,

Hidetoshi Matsunami

Hi, Donald

I have one additional question.

Were you acquired that data by EVM?

Could you tell me conditions of substrate if not?

Best Regards,

Hidetoshi Matsunami

" ...  that data  ..."

To what data are you referencing?

Thank you very much for your reply.

My question was resolved.

Best Regards,

Hidetoshi Matsunami

Hi Donald-san,

I'm Sonoki and I'm working with Matsunami. Now I'd like to discuss more about the condition of PCB when " Thermal Report # 5228" was taken.

As you introduced, I understand that the cold plate is used when the theta JC (top) is measured. But I'm not sure if the cold plate is also used when the theta JB, Psi JT and Psi JB are measured.

I checked some documents from TI and then I found that Psi JT and Psi JB will depend on board size. I referred Fig.5 in SBVA025. So I believe that we need to know the board size used at measurement. Can you ask it to Analog Package group again? 

Following is the document I referred.

http://www.ti.com/lit/an/sbva025/sbva025.pdf

http://www.ti.com/lit/ds/symlink/tps74401.pdf

http://www.ti.com/lit/an/spra953b/spra953b.pdf

http://staging.lierda.com/upload/product/down_path/061228/0262853001167294293.pdf

Best Regards,

Sonoki / Japan Disty

Thermal Report # 5228 is simulation.

I believe that all simulations are based on the standard JEDEC JESD 51-7 board dimensions, unless there is specific request to do analysis using different, fully defined, board dimensions.

In any case, I will forward the question to the Thermal team.

 The reply back form the Package Thermal analyst : 

" ... All of our datasheet thermal metrics are modeled assuming JEDEC PCB (76x114mm). The good news is that for Psi Jt there is very little board dependence, so this value will be a good estimate no matter what PCB they use. Psi Jb has slightly more board dependence, but still a MUCH better way to estimate die temp than using Theta Ja."

Hi Donald-san,

Thank you for your information. I can understand clearly the condition that the Psi Jt and Jb were simulated.

Best Regards,

Sonoki