VDAC LDO has a characteristic to go down after the other power supplies when TPS65910Ax is turned off.
It is explained here: http://e2e.ti.com/support/arm/sitara_arm/f/791/t/178124.aspx
For the AM335x power-down sequence, the datasheet describes it as follows.
"The preferred way to sequence power down is to have all the power supplies ramped down sequentially in the exact reverse order of the power-up sequencing."
"This ensures there would be no spurious current paths during the power-down sequence."
"It is recommended to maintain VDDS ≧1.5V as all the other supplies fully ramp down to minimize in-rush currents."
Do all power supplies except VDAC go down simultaneously?
Is VDAC maintained more than 1.5V until all other supplies fully ramp down?
Best regards,
Daisuke
