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Ripple in TPS65910AA1 step-down converters

Adriano Ramos
Prodigy 40 points

We are using TPS65910AA1 to power AM3352BZCZD60 microprocessor and we are facing problems with ripple levels in the step-down converters connected to Core Supply Voltages. These ripple levels are greater than tolerances established in MPU datasheet (44 mV to VDD_CORE and 48 mV to VDD_MPU).

The figures bellow show ripple measured at VDD_CORE decoupling capacitor (Channel 01) and VDD2 SMPS switching node (Channel 03).

Figure 01

Figure 02

Probably, this supply is in PFM mode but we do not find a detailed discussion of this low-power mode in PMIC datasheet. Could someone help me with the following questions?

1) What are the conditions to enter this low-power mode? Is it possible to turn off this feature?

2) Are the frequencies measured in Figures 01 and 02 related?

3) Would ripple be different if the switching node were continuous?

4) We are using a 10uF capacitor for SMPS LC Filter and the decoupling capacitors mentioned in MPU datasheet (1 cap of 10 uF and 8 caps of 10 nF). This association exceeds the maximum value of 12 uF established in PMIC datasheet to filter capacitor Co(VDD2). What kind of problems can we face exceeding this parameter?

  • 0
    Prodigy 45 points

    Can anyone help us in this post????

  • 0 in reply to RNJ
    TI__Expert 6090 points

    Probably, this supply is in PFM mode but we do not find a detailed discussion of this low-power mode in PMIC datasheet. Could someone help me with the following questions?

    Did you check your layout how SMSP are routed ? high ripple can be related to layout and are the component used as recommended in the datasheet? Especially the ESR specified for the cap in the datasheet.

    1)     What are the conditions to enter this low-power mode? Is it possible to turn off this feature?

    PFM mode is automatically enable when the load is reduced below the PFM/ PWM threshold and this is possible to force the device in PWM mode by writing in to DEVCRTL_REG and disable pulse skipping mode.

    2)     Are the frequencies measured in Figures 01 and 02 related?

    It seems like the PFM burst from time to time.

           3) Would ripple be different if the switching node were continuous?

                Yes, ripple is different .

    3)     We are using a 10uF capacitor for SMPS LC Filter and the decoupling capacitors mentioned in MPU datasheet (1 cap of 10 uF and 8 caps of 10 nF). This association exceeds the maximum value of 12 uF established in PMIC datasheet to filter capacitor Co(VDD2). What kind of problems can we face exceeding this parameter?

    As long as the FB point is close to the near cap of 10uF ,it should not impact much. Adding extra 12uf away from PMIC is not big issue for PMIC. If this extra cap is very close to PMIC this will create some stability issues and longer start up time, higher inrush current also.

  • 0 in reply to Puneet Sehgal
    Prodigy 40 points

    Thanks Puneet!

    I disabled PFM mode through DCDCCTRL_REG and ripple problem was solved.