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LM5010AQ0MH/NOPB

Shihab
Expert 1215 points
Other Parts Discussed in Thread: LM5010, LM5010A

How does the LM5010AQ0MH/NOPB will  behave when Vin is less than 6V, and Vout is still ~5V due to holdup. Could the duration of  Vin <Vout cause latching of LM5010?

  • 0
    TI__Genius 11490 points

    Hi Shihab,

    For VIN<VOUT, the output will discharge to the input because of the body diode of the buck (high side) fet. If you want to hold the VOUT even when VIN falls below VOUT, you should use a diode in series with input (before CIN) or output(after COUT) to prevent reverse current flow.

    Regards,

    Vijay

  • 0
    TI__Intellectual 1435 points

    The LM5010A will   attempt to regulate Vout as Vin falls until the VCC voltage falls to  the lower UVLO threshold which is near 5.1V.   When VCC falls below this voltage switching is terminated and SW pin voltage settle at a level equal to Vout.  The high side FET of the LM5010A  has a body diode from SW pin to VIN pin that will pass current from the output to the input if VIN is  more than  0.7V below the SW pin.   Qualification testing prior to product release includes  latch-up tests with current forced into and out of each pin.   Latch-up test  current is typically +/- 200mA and  latch-up will not occur at currents below this level.   However, damage could  occur if  VIN is pulled low through a low impedance and a high current flows from Vout through the inductor and SW pin to VIN.   The  dv/dt of the output capacitor when VIN falls is a good indication of  the reverse inductor current flowing from Vout into the SW pin.   (I = C dv/dt)