TLC5951: Daisy Chain

There is no theoretical limit as long as you can maintain the required timing requirements for the control signals.  The more ICs that are connected in series, the slower the system refresh rate.  The uP must clock in 288*n bits of data, where n is the number of cascaded ICs.  If you cascade 100 ICs and clock in data at 1MHz, it takes 28.8ms just to clock in data.  In a video application, this gives you a maximum refresh rate of 34Hz which will be seen as flashing by the human eye.  If the application is a static image, it is not a problem.