This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LM5010 design having trouble starting with Vout prebiased

Other Parts Discussed in Thread: LM5010

I have an LM5010 design (attached), and something I can't figure out.  Due to some leakage current from a battery (still investigating), there's a situation where there is about 3.2 to 4V present at Vout with Vin not connected.  (Probably  there's some opportunity for some body diodes conducting, as I see about 2.4V present at Vin in this case).

When voltage is applied to Vin, the regulator doesn't start at all.  Disconnect the leakage source, and it starts up.  I'm trying to figure out what is it that's keeping the LM5010 from starting, hopefully it's a circuit mod or addition that's simple.  At least, I'd like to find a reasonable explanation for the behavior.

webench_design_423954_53_936937995.pdf
  • This issue is fairly straight-forward. 

    1. The BST-SW pin voltage difference must be greater than the gate drive UVLO or the UVLO circuit will disable the regulator.  The gate drive UVLO is specififed at 3.0V typical (1.7Vmin, 4.0Vmax).  
    2. The BST pin voltage prior to start-up will be the VCC regulator voltage minus the internal diode drop.  The VCC voltage is 7V typical (6.6Vmin, 7.4V max).  The typical VCC voltage minus one diode drop will be around 6.4V.  
    3. The SW pin voltage will equal the VOUT voltage prior to start-up.  If Vout is from 3.2V to 4V, the the voltage difference between BST and SW will be between  6.4V-3.2V and 6.4V-4V.      This is right in the middle of the gate drive ULVO range so most parts will not start.   

    Starting the LM5010 with pre-bias requires pulling SW low to produce at least 4V difference from BST to SW.  A SW pin voltage of 2V or less would be sufficient based on the worst case VCC and gate drive UVLO specifications.   You could use a resistive load on Vout to pull SW low or  a MOSFET pull down on SW driven by narrow one-time pulse at start-up.

  • thanks for the answer that's very useful.  I was able to get rid of that prebias, luckily, and the chip starts up reliably now.

  • How does the LM5010 sense the Vout? Is it thru the feedback sense resistors?
  • Hthesh,

    In start-up condition with pre-bias, the LM5010 receives  output voltage information at both the SW pin and the FB pins.  The critical condition for start-up is the SW pin voltage because a minimum difference between the BST pin and SW pin is required for switching to begin.   The BST capacitor is charged from VCC through an internal diode.  If SW is pre-biased to more than a couple volts, the voltage difference between BST and SW will be too small to turn on the high side FET.

     

  • Thanks.
    If the LM5010 can sense output voltage only thru the FB resistors and not the SW pin, would I still see the problem.
    What if I put a diode at the output, but with FB resistor after the diode (at the cathode).
  • The FB voltage has no affect on the start-up with pre-biased output. Only the SW pin voltage is important.
  • Last question: when the regulator shuts down due to under voltage (lets say Vcc UNLV). Does it act as an LDO?
    If Vin is 4V, Vcc would be 4v too?
    What voltage should I expect at SW pin.