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TPS43060 : Not drive the gate of the FET

Other Parts Discussed in Thread: TPS43060

A problem that will not drive the gate of the FET in the follwing conditions have occured.

- Conditions -
Device : TPS43060
Input  : 24V
Ouput  : 48V / Max 2A
Temperature : -5℃ ~ 50℃

Repeated ON/OFF of the power once in about 3 minutes.

- Inquiry -

/ Phenomenon in which the gate of the FET is no longer driven by the start-up test of the customer,as it appears in the output24V input24V will have occured.
  EN/PG is controlled by the FPGA,the state of the Enable is confirmed
  Are there anything wrong in the avove circuit?
 
/ Is GND of the PGOOD pin and EN pin inside the IC AGND or PGND?
  According to the block diagram PGOOD looks to AGND.
  Should customer be connected to AGND to GND of the CPU and FPGA if you are connected to the CPU and FPGA?
 
Thanks in advance for your support.

6431.schematic TPS43060.xlsx

  • I don't see anything unusual with a review of the schematic.

    Does the startup issue occur every time or only during the on/off power test? Does the TPS43060 output anything when the output doesn't charge up? Such as the VCC pin and SS pin?

    The PGOOD is connected internally to AGND. However the connections not very important as the PGOOD generally isn't a noise sensitive signal since it is more of a digital output. Also the AGND and PGND pins are connected externally.