how to use on the board LP5521

Hello Tsuguhiko-san,

See the answers below:

There is a resistance near EN Pin in P22-Figure27 of the Datasheet.
Where is this resistance in the inside and the outside of the IC?

The resistance is internal (inside the IC)

■In the case of those Pin disable,
do you recommend that customer perform pulling up of those Pin with 10kohms on their board?

There should be pull-up resistors for the I2C data and clock signals (SDA and SCL).

■In the case of GPO disable,
do you recommend that customer perform open on their board?

If GPO is not used, you can leave it unconnected.

■In the case of VDD=5V, do you recommend ChargePump disable?

If you have 5V in VDD you should set the ChargePump to 1x mode (bypass mode).

Best regards,

Sami

Dear Sami-San,

Thank you very much for your answer.

Let me ask following question by addition.

■Would you tell us the value (kohms) of the internal resistance of the IC?

■Would you tell us the recommendation value of the  resistance,

when customer do Pull-Up in the outside of the IC on their board?

■Would there be the recommendation schematics (including Pull-Up resistance value)?

Best Regards,

Tsuguhiko Asai

Hello Tsuguhiko-san,

Do you need to know the exact value of the internal resistance? The internal resistance is not kOhms. It is some Ohms.

We have used 1.5 kOhm resistors in I2C communication (SDA, SCL). Customers might already have those in place if they have multiple devices in the I2C bus.

For reference you can check the LP5521 evaluation kit document (User Guide) SNVA241D. There is schematics of the evaluation board.

Best regards,

Sami