LM26480 LDO1 & LDO2 - Can I connect them to the same power?

Jason,

There were several forums in this subject on Oct 2013 and Jan and Feb of 2014.  In principle this should work and using mosfet instead of pnp pass transistor should be less likely of current hog situation, beside there regulators are current limited so you can't really damage it there is additional thermal shut down protection.  I have ran it in the lab showing it is functional at max Io, though no long run time or transient tests.  You really want to get the outputs well matched over the corners of operating conditions before verifying them in parallel.  Since the device is not designed or spec'ed as such so user is responsible for the apps performance.  Let me know how it turns out after you have a chance checking it out.

Kern

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• RE: LM26480 parallel LDO operation

   INT

  2014 February 01 By Kern Wong

  See Oct 8, 2013 reply to Gustaov In general paralleling LDOs has been used by people before. Cursory test at typical conditions seem to accord it works. The reason it works is that the current limit and/or short circuit protections are there, so unlike transistors w/o neg fb, and in particularly these are MOSFET based so unlike bipolar transistors they won't get into a current hogging situation and easily became overheated and get damaged. As often happens user designs standard parts beyond their DS spec, which is fine so long as they are knowledgeable of the limitations/pitfalls/potentials involved. Advise for customer is to thoroughly check its design- validate the system operation over all operating conditions/parameters ensuring no adverse effects. And it will be nice to have a warning or recovery/reset scheme if clamping ever occurs so system knows how best to handle.. Kern  ------------------------------- Hi Gustavo, Just like to follow up on your customer's progress.  By the way, I neglected to mention the on-chip LDOs on our PMUs are PMOS FET based technology.  Thus, unlike those of bipolar PNP/super-B PNP types that were difficult controling current robbing issue when transistors are working in parallel and with large voltage deltas. Hope this may help for your reference. Kern

 " ... while connecting both LDO1 and LDO2 to 1.8V to double the current supply ..."

Not likely that you will be able to double the output current. Most likely you might get up to 50% or 60% more current, but you might not like the resulting load regulation side effect.

If you simply tie the two outputs togethers, any difference between the two output voltages (even a few millivolts) will cause the highest Vout to provide 100% of the current until it is pulled down, by either current limit or load regulation, to match the lower Vout. The typical solution is to add a low value series resistor to each output to attempt balance the load current.

See the following : Application Report SLVA250 "Ballast Resistors Allow Load Sharing Between Two Paralleled DC/DC Converters" :

http://www.ti.com/lit/an/slva250/slva250.pdf

Search in this forum (Linear Regulators) for : parallel

My best generic guess ... presuming the the two Vfb thresholds match within +/-0.5%, using +/-1% resistors, (464k and 178k) ... with a 500 milli-ohm ballast resistor on each output, when the LDO with the highest Vout reaches 300mA the lower Vout LDO would be sourcing 160mA for a grand total of 460mA. The downside is that the voltage on the load side of the ballast resistors has dropped about 150mV between a load current of 0mA and 460mA.