It is described in datasheet as the following,
"The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88."
Could you teach me about the test condition of ANSI SEMI standard G30-88 ?(configuration of thermal pad pattern, dimension, etc...)
If it is possible, I would like to get the material.