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LP2954 glitch on coming out of shutdown

Other Parts Discussed in Thread: LP2954, LP2951-N

I am using adjustable version of LP2954IM in standard way like Figure 24 in data sheet, with Vin = 16V and R1 = 100K (with and without 100pF in parallel) and R2 = 10.9K thus output voltage 12.5V.  The output has 10uF 25V ceramic on it, and no load other than R1 and R2. The input has 4.7uF 25V ceramic and a 3300uF electrolytic. I am turning the regulator on by applying a logic high to the SHUTDOWN pin.  

When SHUTDOWN goes high I find Vout rises to almost 16V and then decays to the correct value of 12.5V over about 80ms.  By applying a load resistor (e.g. 1K) I can reduce the time constant, e.g. with 10K it reduces to 8ms but still starts at 16V.

Adding 100pF across R1 makes virtually no change.

What is wrong?  Surely this is not correct operation?  There is nothing in the data sheet to specify the dynamic effect when SHUTDOWN is switched.  I thought to start with it was something to do with the risetime of my SHUTDOWN pulse but I think I have ruled that out, and anyway the datasheet says there is hysterisis on this input so therefore the risetime should not matter.

If there is no solution, I shall have to change for a different regulator as 16V will kill the OLED display that this regulator will be supplying.

  • After further testing I have found that increasing the value of the capacitor in parallel with R1 to 1nF cures the problem, but I wonder if such a large value will affect the dynamic performance of the regulator in other ways?

  • Based on your description of the problem (output voltage overshoot) and your solution (adding Cb across R1), I suspect the root cause of the overshoot may be the use of a ceramic capacitor for Cout. Use of a low ESR tantalum might signifigantly reduce, or eliminate. this overshoot.

    The LP2954 datasheet adds this bypass capacitor across R1 (in Figure 24) to create a low-pass filter to reduce high frequency noise. The effect at power-on is to create a behavior similar to soft-start while this capacitor charges up from 0V to 'Vout-Vref'. The secondary effect is that this low-pass filter also creates an additional pole and zero in the control loop that is typically used to offset the low esr of ceramic output capacitors. (The LP2951-N datasheet has some discussion on this subject)

    The LP2954 datasheet suggests that for noise reduction purposes Cb be set to :

       Cb= (1 / (2 x pi x R1 x 20Hz) )

       Cb= (1 / (2 x pi x 100k x 20Hz) ) = 80nF

    In short:

        Yes, adding this capacitor is a proper fix.

        No, 1nF is not such a large value.

  • I have a similar problem with the LP2954 fixed 5 V version.  I was also using ceramic capacitors, and found that at power up when the input steps from off to 24 V, the output overshoots to 11 V before dropping back into regulation.  I was able to reduce the overshoot by changing the output capacitor from 10 uF ceramic to 22 uF Tantalum, but it is still there.

    Since this is a fixed regulator, I don't have the option to tailor the error amp frequency response by adding capaitance to the sense resistor network.  Anyone have ideas on how to reduce the overshoot?

  •  This is similar to the Vout overshoot discussion in the LP2951-N datasheet.

    What is happening that with a Vin that is rising faster than Vout can keep up, the LP2954 feed-back loop goes into saturation trying to force the PNP pass element to deliver more current to the output (active current limit, ILIMIT, prevents that). When the output voltage does finally get to the 5V threshold the control loop needs time (bandwidth) to start throttling back the drive to the PNP pass element and return itself to linear operation. The time between Vout crossing 5V and the control loop regaining control is where the overshoot happens.

     

    There are only two possible solutions here: 1) Slow the Vin rise time; and/or 2) increase Cout capacitance.

     

    Slowing the Vin rise time would be preferred as the overshoot might be totally prevented, but there are caveats: Rise time must be slow enough that LP2954 Iout current does not reach current limit while charging Cout; and any method used to slow Vin should not cause any significant voltage drop that might affect normal operation.

     

    Increasing the Cout value does not prevent the overshoot; it just changes the rising slope of Vout so that for the same amount of recovery time the overshoot voltage is reduced proportionally.

  • I increased the output capacitance as much as I could in the existing PCB footprint.  It works well enough, but the overshoot still slightly exceeds the Vdd max. spec of the digital components, so its not a long term solution.

    Even larger capacitance will require a board spin, and when I do that I'll completely redesign the power supply instead.

  • Did you try adding a small series resistor? 

    ~Leonard