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TLC5927 error detection, questions and problems

Other Parts Discussed in Thread: TLC5927

Hello,


In our custom board, we have a TLC5927 (only one device) to control some LEDs. We are able to turn ON/OFF the LEDs, enter in Special Mode (and come back to Normal Mode) and adjust the output current. But we have problems understanding the reading status code sequence.

About error status code:

In the page #3, there is this note:  "(1) The device has one single error register for all these conditions (one error bit per channel)". Since there are several error detections available (open circuit, short circuit and over temperature detection), how can we access to these different errors with the same register? How can we "translate" the reading? We are supposing that the register size is 16 bit (the reading).

In Figure 13, what is the meaning of  "Error Detection" in the data source of shift register line? We understand that after the second 0 in OE line is sampled, the data input source changes from SDI to Error Status Code, but is this some type of command to select the error that we want to read? We do not have found any definition in the datasheet.


About sequence:

We have divided the sequence of reading status code in two parts, "error detection phase" , until the first rising edge of OE after it goes lows and "reading error phase", from this rising edge to the end of the communication. The timing requirement of OE signal is compliant, the signal goes low more than 2 us. With this, we obtain all zeros in SDO when all LEDs are ON. We have seen in the forum that many people has the the same problem, but we do not have any definitive solutions. We are going to do more test, but we would be grateful some help.

Thanks in advance.

  • Hi,

     

    To answer the first question, no.  There is not a way to distinguish between the different errors since they all use the same register.  As for reading all zeros (errors on all channels), have you read through this post:

    http://e2e.ti.com/support/power_management/led_driver/f/192/p/234866/940824.aspx#940824

     

    One person found they received these error because the LED supply voltage was too low.

    There are some reports that entering special mode 2X (back to back) is needed to consistently read error status. Although, we have not been able to duplicate this in lab.

    I would recommend you check these 2 things and let me know if you are able to make any progress.

     

    Kind Regards,

    Adam Hoover

    Drivers and Load Switch Applications Engineer

  • Thanks for your quick answer.

    So, if we read a zero at bit #15, we only could say that the OUT#15 has had a problem or the error detection has not been possible, but we cannot identify if the problem is an over temperature, short circuit or open circuit or something so simple like to know if it has been a fail detection or a real error. Is this affirmation correct?

    Yes, we have read that post before, but we want to ensure our knowledge about the status error reading before we start to make hardware modifications. In the other hand, we have tried to enter in special two times, but we have not seen any changes.

    And the last question, the timing requirement related to the time that the OE signal has to be low (>2us): does it have an upper limit?, that is to say, while the OE signal is low (in our case more than 20us or even more), does the Status Error Code remain latched in the device until the rising edge of this signal (unconditionally to the time that OE signal is low )? And when this rising edge occurs, the code appears in the SDO line.

    Thanks again.

  • Hi,

     

    Your affirmation is correct.  You cannot identify what mechanism caused the error.

    There does not appear to be an upper limit on how long the OE can stay low.  Once the status error code is latched into the shift registers, it should stay there until OE is pulled high and new data is shifted in via SDI.  The error status code should be the first 16 bits shifted out after OE is brought high.

    Also, as depicted in Figure 13, "The occurrence of the third or later 0 saves the detected error status code into the shift register".  You specifically mentioned two 0's in your original post, but I suspect you have at least three if you continue to run the clock for your entire >20us use case.

    Since you continue clocking data while OE is low, and you bring OE high before trying to read the error status code, it seems the device is actually detecting errors. 

     

    Open circuit will be detected when:

    IOUT,Th = 0.5 × IOUT,target (typical)

     

    Short circuit will be detected when:

    VOUT > VOUT,TTh (2.4V min,2.6V typ,3.1V max)

     

    Regards,

    Adam 

     

  • Adam Hoover1 said:
    The error status code should be the first 16 bits shifted out after OE is brought high.

    Yes, we start to read the SDO line to receive the shifted code, but we always obtain a burst of zeros. We are going to start to check our voltage values.

    Adam Hoover1 said:
    Also, as depicted in Figure 13, "The occurrence of the third or later 0 saves the detected error status code into the shift register".  You specifically mentioned two 0's in your original post, but I suspect you have at least three if you continue to run the clock for your entire >20us use case.

    I only mention two zeros in my answer to remark that from this moment the data input source changes from SDI to Error Detection. But yes, your suppositions are correct, in these >20us, there are more than 3 zeros (much more).


    Thanks for your time.

  • Hello,

     

    I just wanted to follow up to make sure this issue gets resolved.  Have you been able to determine what is causing the errors and found a suitable fix?

     

    Best Regards,

    Adam

     

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  • Hello,

    we have not made hardware modifications yet. We have coded a routine that sets the Special Mode, launches the error code sequence and go to Normal Mode cyclically. A timer triggers each sequence with a timing. With this method, we obtain a zero line in SDO (in an oscilloscope), while three LEDs of the total are turned on. Our voltages threshold seems to be  in agreement to datasheet specifications.

    Taking into account other threads, is not there any upper limit about the time that OE signal has to be low, after the first CLK period? I divide the sequence represented in figure 13 of the datasheet in two parts: set OE low to start  the error detection and set OE high to read the SDO line, but between this two parts there is a time greater than  30 ms in real running, and much more If I debug with breakpoints.


    Best regards,

  • Hi,

     

    What makes you think there would be an upper limite on the time OE can be low?  From the datasheet, there does not appear to be an upper limit on how long the OE can stay low.  Once the status error code is latched into the shift registers, it should stay there until OE is pulled high and new data is shifted in via SDI. 

    If you do suspect this to be the case, is there some way you can decrease the delay to confirm?

     

    Regards,

    Adam