Hi Everyone,
Now our customer has been evaluated LM5114 as the part of PFC circuit and then they found abnormal droop at rising of gate pulse. I'd like to define the reason of this behavior, so your advice will be appreciated.
This abnormal droop is happened at rising of gate pulse when it was measured at Gate pin of FET (See inserted waveform) though it was not happened at output of LM5114. We’d like to know the cause of this behavior, such as layout issue or relation with parameter of FET.
It was not improved when Rchg was changed to larger value. Cds was added to improve this behavior, in other words the gate pulse at Gate pin on FET is more noisy without this additional capacitor Cds.
It's not difficult to disclose the part number of FET they're using because it's unreleased part, but I can share its parameter via E-mail directly, so please contact me directly for detailed information.
Your quick response will be appreciated.
Best Regards,
Sonoki / Japan disty
