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TPS62220 Startup Time

Cliff Vrla
Prodigy 520 points
Other Parts Discussed in Thread: TPS62220
Greetings, The following questions are about the startup behavior of the TPS62220. The datasheet does not explain this very well.
1) What is the variation in startup time for the TPS62220? Is this characterized or tested?
 
2) HOW does startup depend on output capacitance and load current? Is there an equation available to predict the startup time?
 
3) Is the graph shown in fig.13 (TPS62220 p9) NOMINAL? 
 
4) Are the steps shown in the graph, TIMED steps? Or are they the result of a current/voltage comparison?
 
5) What may be the cause of NOT seeing the startup 'steps' as indicated in fig.13? In other words, the startup waveform is a smooth ramp with only slightly noticeable 'breaks' in the dV/dt.
Thank you
  • 0
    TI__Mastermind 36110 points

    1. Startup is not characterized or tested.  The steps are explained in the datasheet, but the stated current values are only typical and could have significant variation.  Each softstart step lasts for 255 clock cycles.

    2.  A larger capacitance and load current could increase the softstart time if the output capacitor is not able to reach the regulated voltage level with the available current.  The current from  the IC is split between going to the load and charging the output capacitor.

    3.  All datasheet graphs are nominal unless stated otherwise.

    4.  The steps are 255 clock cycles each.

    5.  Too much load current or capacitance could cause the output to ramp slowly rather than have  the "stairstep" waveform.  You can check this by measuring the inductor current and load current at the same time.  The difference between the two currents is what is available to charge the output capacitor.