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UCD90160 not honoring power-down delays

Ron Byland
Prodigy 10 points
Other Parts Discussed in Thread: UCD90160

I'm using a UCD90160 to power up/down many rails. I want to make sure the sequencer goes through the right sequence, before I power up the rails for the first time. I included in the power supply design, a way to disable the power in to all rails, so I can observe the sequencing before the power is applied. Unfortunalely, this means that all of the monitors will not be getting voltages that are in tolerance. To get around this, I removed all rail dependancies, and did all the sequencing based on time only.  The power-on delays look similar to the timing graph in Fusion Designer, but the power-off delays are not correct. Two rails that have quite different power-off delays are shutting off at the same time, and changing the delay values has no effect. I have attached the .xml file for this configuration. An help is appreciated. I'm in a bit of a bind on this one. Thanks.

 

4540.MCD_pwr_cfg.xml

  • 0
    TI__Genius 9340 points

    The TOFF_DELAY is only applied if rail is commanded off, not by power off the device (in your configuration, rails are commanded off when Control Line is asserted)

  • 0 in reply to Anne Ngo77
    TI__Genius 13700 points

    Not sure how the sequencing will work under this scenario.  Since the turn-on sequence appears to be based on the combination of CTRL line, Rail and GPI Seq On Dependencies and Ton Delay.  And Turn-off sequence on CTRL line, Rail and Seq Off Dependencies and Toff Delay.

    Given that there is no monitoring, there would be no dependency triggers for the Rail On and Off Seq Dependencies and the sequencing should hang.

    If you would like to test the power sequencing prior to fully populating the board with customer's expensive silicon, I would suggest building up a board with just the sequencing and power system devices and run testing this way.